First complete PCI Express verification solution

Mentor Graphics and Altera have developed a reference design to accelerate the development of applications based on PCI Express serial interconnect technology.

Mentor Graphics and Altera have developed a reference design to accelerate the development of applications based on PCI Express serial interconnect technology.

The reference design comprises a configurable PCI Express IP core and in-circuit emulation verification solution from Mentor Graphics, and a Stratix-based PCI card from Altera.

The Mentor Graphics board illustrates a PCI to PCI Express Bridge application running at full speed in an Altera Stratix PLD- based PCI card.

The system is designed to connect to Mentor Graphics' VStation hardware emulation platform via a parallel interface, and implements a back-to-back bridge that converts PCI through to PCI Express protocol and back to PCI.

"Altera was a key partner in the development of the Mentor Graphics PCI Express reference design", said Michael Kaskowitz, General Manager of the Mentor Graphics Intellectual Property (IP) division.

"Altera's Stratix FPGA fabric and development systems provided the ideal platform for our PCI Express core development.

Through this partnership, our configurable PCI Express core combined with the 2.5GHz tranceivers in Altera's Stratix GX FPGAs represent the industry's first PCI Express solution which incorporates which incorporates updates from the 264-page PCI Express Base Specification Errata".

"We're finding the demands of emerging computing and communications platforms are driving the need for much greater internal system bandwidth", said Craig Lytle, Vice President of Altera's IP Business Unit.

"Mentor Graphics has a clear leadership position as a provider for PCI Express IP.

With an unsurpassed reputation as an IP developer, we enthusiastically entrust Mentor Graphics to provide PCI Express as part of their large portfolio of optimised FPGA cores as a means of satisfying our customers' wide range of requirements".

For many designers, new standards are difficult to implement because of the lack of verified subsystems.

The reference design from Mentor accelerates PCI Express-based system design, provides a PCI Express test environment and minimises design risk, enabling these designers to focus more resources on product differentiation.

By using the PCI to PCI Express feature of the demonstrator boards, customers can now validate PCI Express using today's PCI based computers.

By working with Mentor emulation solution experts, the PCI Express reference design has been engineered to run with Mentor's VStation and Celaro emulation platforms.

As actual PCI Express systems do not exist, designers must perform lengthy verification checks in software and compare results against the paper specification.

Mentor accelerates this process by a million times by connecting the customer's SoC design to PCI or future PCI Express systems through the Speed-Bridge capability of the reference design.

This high performance, in-circuit emulation environment is essential for comprehensively testing designs with PCI Express interfaces.

By solving the hardware prototyping challenge, Mentor is mitigating the schedule and development risk associated with developing a PCI Express verification solution.

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