Integrated design and verification for Spartan-3

Mentor Graphics is providing comprehensive design tool support for the new Spartan-3 platform FPGAs from Xilinx.

Mentor Graphics is providing comprehensive design tool support for the new Spartan-3 platform FPGAs from Xilinx.

Mentor is providing tools for simulation, synthesis, design creation, PCB timing verification, and PCB/FPGA integration, continuing its commitment to provide complete design and verification environments tailored for Xilinx leading high-density, low-cost programmable logic devices.

"Mentor Graphics is the first EDA company to have a fully integrated design and verification solution for 90nm Spartan-3 FPGAs", said Simon Bloch, General Manager of Design Creation and Synthesis for Mentor Graphics.

"Close collaboration with Xilinx enables Mentor to deliver the leading-edge solutions for logic, PCB and system-level design that our mutual customers need today".

"Mentor Graphics has had significant global success in the design spaces Xilinx is aggressively targeting with the new Spartan-3 platform", said Dave Bennett, Vice President of Logical Systems Software at Xilinx.

"Mentor solutions enable high-volume designs through an easy-to-use development flow for applications such as low-cost routers and storage servers" Creating a multi-million-gate design requires a comprehensive set of design tools tuned to maximise ease-of-use.

The FPGA Advantage tool is a complete integrated design environment (IDE) offering text, tabular, and graphical RTL design creation, design visualisation, automatic documentation, sophisticated IP discovery, team design support as well as industrial quality verification and synthesis.

FPGA Advantage includes the ModelSim logic simulator for superior design verification.

Mentor Graphics offers a standalone, Xilinx OEM version of ModelSim, version XE v5.6e, that provides Spartan-3 device designers with enhanced mixed-language simulation features.

FPGA Advantage leverages the Precision RTL synthesis tool, the Mentor Graphics next-generation synthesis platform, to enable efficient, timing-driven design implementations.

The Precision RTL product delivers the most accurate timing analysis, automatically finding and fixing timing problems prior to programming the FPGA, avoiding frustrating, time-consuming design iterations.

Mentor Graphics provides synthesis support with both the Precision RTL tool and the LeonardoSpectrum environment, enhancing both tools to deliver advanced technology mapping to take full advantage of device features including built-in RAMs, ROMs and multipliers.

The result is excellent quality of results including smaller and faster designs.

Traditionally, FPGA design and PCB design is done separately by distinct design teams using different EDA tools and processes.

The existence of multiple design processes can create interprocess connectivity and timing closure challenges, which can impact both performance and cost-to-market for designers.

Mentor Graphics offers the BoardLink environment, a bidirectional system integration between Mentor's PCB solutions and the FPGA Advantage product or the Xilinx design tools, to help enable a smooth integration of Xilinx Spartan-3 FPGAs on PCBs.

The BoardLink tool enables PCB integration by providing custom FPGA schematic symbol generation, user directed symbol fracturing, and PCB schematic updates for FPGA pin changes.

This approach provides Spartan-3 users with an FPGA on Board solution that eliminates manual integration errors.

The Spartan-3 platform supports many types of high-speed industry standard interfaces and PCB level timing verification can be greatly enhanced through static and symbolic timing analysis (STA) tools.

The Xilinx ISE 5.2i development tools support stamp model generation, enabling use of the Tau board level symbolic timing analysis tool.

Mentor's unique combination of timing analysis together with signal integrity analysis provides a timing driven, high-speed design methodology.

The Mentor HyperLynx tool and the ICX product signal integrity analysis tools can be used in conjunction with the Tau timing analysis product for complete system and PCB verification capability.

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