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Product category: Design and Development Software
News Release from: Mentor Graphics UK | Subject: ADVance MST
Edited by the Electronicstalk Editorial Team on 07 May 2003

Simulator speeds adaptive equaliser to
market

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The Mentor Graphics ADVance MST (ADMS) mixed-language simulator was successfully employed in the development of the new SiWorks SC-ALIU adaptive equaliser core.

The Mentor Graphics ADVance MST (ADMS) mixed-language simulator was successfully employed in the development of the new SiWorks SC-ALIU adaptive equaliser core The SC-ALIU adaptive equaliser core enables telecom semiconductor vendors to develop highly sophisticated long haul line interface units (LIUs) and thereby deliver a highly integrated and cost-effective solution to their OEM customers

ADMS enabled accurate, fast simulations of the SC-ALIU's tightly coupled analogue and digital blocks.

"Overall, we were able to complete the design much faster using ADMS", said Dr Ivars Finvers, Director of Analogue IC Design at SiWorks.

"In fact, we consider ADMS an enabling technology for the design, since it allowed the very tight integration of the analogue and digital blocks in a transparent manner and ensured that the design was first-time-right in silicon".

Consisting of a programmable gain amplifier (PGA) and four cascaded, first-order high pass sections, the SC-ALIU was designed for a long haul line interface unit (LIU) for a telecomms application.

The SC-ALIU equaliser tuning can simultaneously compensate for both line length attenuation and process variations.

To adjust the equaliser settings, a mixed-mode analogue/digital-tuning controller uses pulse amplitude and edge timing information.

"The SC-ALIU is a highly sophisticated design, and a testament to the skill of the designers at SiWorks", said Henry Chang, Director of Marketing, Mentor Graphics Analogue/Mixed-Signal Product Division.

"We are very proud that the performance of ADMS helped enable the completion of this advanced design".

Initially, a high-level behavioural simulation of the entire core was created using ADMS.

Then, throughout the design process, as the transistor-level design of each analogue subblock was completed, it was substituted into the high-level model for system-level verification.

ADMS enabled rapid swapping between transistor-level subcircuits and VHDL-AMS subblocks.

Because ADMS is language-neutral and uses a single netlist hierarchy, SiWorks designers had the flexibility to freely combine design languages anywhere in the design.

ADMS combines five high-performance simulation technologies in a single-kernel environment: Eldo, for analogue, large-signal Spice simulation, ModelSim for digital simulation, analogue HDLs (Verilog-AMS, VHDL-AMS), Mach for fast transistor-level simulation and Eldo RF for modulated steady-state simulation.

The SC-ALIU adaptive equaliser core design was completed in 2002 and has been successfully verified in production silicon.

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