Product category:
Design and Development Software
News Release from: Mentor Graphics UK | Subject: Seamless
Edited by the Electronicstalk Editorial
Team on 07 May 2003
Faraday opts for Seamless coverification
support
Faraday Technology Corp has selected the Seamless tool as its coverification environment for the DSP and microcontroller cores in its intellectual properties library.
Faraday Technology Corp has selected the Seamless tool as its coverification environment for the DSP and microcontroller cores in its intellectual properties (IP) library Faraday is also to release its first Mentor Graphics Seamless processor support package (PSP)
This article was originally published on Electronicstalk on 27 Feb 2002 at 8.00am (UK)
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The PSP will model its FD216 16bit DSP core, the first in a planned series of PSPs to target audio processing applications such as MP3 players, photo printing and JPEG decoders.
"Hardware/software coverification is a critical component of the system-on-chip verification process", said Dr George Hwang, Vice President of Research and Development for Faraday.
"We determined the need to support this technology for our IP.
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Mentor Graphics can now provide coverification model support for the high-performance ARM1020E and ARM1022E cores from ARM.
Seamless coverification support for ARCtangent
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Coverification package analyses system performance
Version 5 of the Seamless environment extends the use of the tool beyond hardware/software coverification to system performance analysis.
Looking at available solutions, we chose Mentor Graphics as our partner given the proven market leadership of the Seamless coverification tool.
With the FD216 PSP, our customers can use the Seamless product to verify their design in an integrated hardware and software simulation environment through virtual prototyping".
"A growing number of IP providers such as Faraday Technology are recognising the importance of hardware/software co-verification in verifying their IP in SoC designs", said Serge Leef, General Manager of the System-on-Chip Verification Division at Mentor Graphics.
"Results show that the Seamless tool brings significant gains in verification productivity.
Customers have reported savings of one to three months in typical embedded project schedules.
As partners like Faraday develop the Seamless models the technology becomes available to their customers who can then realise the benefits of the solution".
First introduced in 1996, the Seamless hardware/software coverification environment has become firmly established as the market leader with support for over 120 microcontrollers and DSPs.
Since then it has been adopted by a wide range of customers designing embedded systems across a broad range of applications.
Faraday Technology licensed the Seamless product in 2001 and subsequently undertook development of the PSP for the FD216 DSP.
The FD216 is a high performance, easy to use, 16bit embedded DSP processor.
This processor includes a DSP core, on-chip data memory, program memory, two serial ports, one timer, 12 programmable I/Os, an internal DMA (IDMA) interface, an external memory interface, and a serial ICE interface.
The DSP core has a four-stage pipeline architecture, which provides operating frequencies up to 190MHz (typical case), for 0.18um process applications with low operating power requirements.
Its single-phase clock and standard-cell based approach allows customers to quickly integrate the FD216 into their SoC designs.
Seamless provides support for all popular logic simulators and many software development environments, including the Model Technology ModelSim environment.
The FD216 PSP utilises a proprietary code development tools and debug environment from Faraday Technology.
The Seamless tool is available on Solaris, HP/UX and Red Hat Linux platforms.
Pricing starts at $40,000.
For more information, or to register for free Seamless workshops and functional verification seminars, visit the Mentor Graphics website.
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