FPGA software moves to a new level

The latest version of FPGA Advantage features a new design cockpit that integrates recent updates to the HDL Designer Series, ModelSim and Precision RTL Synthesis products.

The latest version of the FPGA Advantage integrated design environment features a new design cockpit that integrates recent updates to the HDL Designer Series, ModelSim and Precision RTL Synthesis products into the EDA industry's most interoperable and flexible design flow for managing FPGA design creation, verification and implementation.

"Mentor Graphics continues to execute on a strategy that provides individual designers and design teams with completely interoperable tool flows that manage the complexity of today's FPGAs", said Simon Bloch, General Manager, FPGA Design Division, Mentor Graphics.

"We were the first to integrate design creation, synthesis, and simulation and with FPGA Advantage 6.1 we look to extend data connections with more tools in the FPGA design flow".

Key to the design management features of FPGA Advantage is a new intuitive design cockpit that simplifies design creation and begins analysis the moment a design project is formed.

Textual, tabular and graphical editors can be combined with design elements from ModuleWare, previous designs, external IP providers, and IP from FPGA vendors' macro and IP libraries.

Combined, these elements provide a rich variety of design creation means to rapidly construct the FPGA.

In addition, team design and analysis capabilities of the data provide easy navigation and the ability to search and organise data to aid in understanding design content.

"Complexity in FPGA design can be defined by the number of design files, the increasing number of system gates, higher performance characteristics or even the number and location of engineers on a design team", said Valerie Rachko, Marketing Director for HDL Designer Series and FPGA Advantage for Mentor Graphics.

"FPGA Advantage offers a complete environment to manage the chaos of today's complex FPGA designs, while giving designers the freedom to achieve their design objectives".

FPGA Advantage provides several options for verifying a complex design.

The tool accelerates the functional design development by focusing on optimising the entire design creation, verification and modification design loop while providing the designer the flexibility to verify the way that matches his design style.

Dynamic animation features enable the ability to view simulation results within the design creation editor to reveal high-level design and functional behaviour, as well as enabling designers to debug a design exactly as it was entered.

FPGA Advantage features advanced synthesis capabilities to implement high-complexity FPGA designs.

Integrating precision RTL synthesis, FPGA Advantage includes capabilities that transform FPGA vendor-independent hardware description language (HDL) code into a structural design that effectively leverages specific design architectures.

With its vendor independent features, FPGA Advantage allows design teams to consider several component cost alternatives that can be leveraged to optimise product profit margins.

The synthesis engine in FPGA Advantage leverages a new architecture signature extraction algorithm that provides data on how to best use the FPGA fabric as well as the available embedded memory, DSP block or clock management resources.

The algorithm optimises signal paths to achieve timing requirements that best leverage the features of the FPGA fabric.

Every design must be documented.

FPGA Advantage automatically documents all stages of the flow using the Microsoft object linking and embedding (OLE) and HTML export formats.

The documentation that is created is associated directly to the design, preparing for inevitable future design re-use.

Every FPGA must be placed on a printed circuit board.

Integrating complex FPGAs on to a PCB may result in expensive PCB respins due to the introduction of manual data entry errors.

Mentor Graphics is the only company with an integrated FPGA and PCB design flow that automates the physical chip and board integration process.

FPGA Advantage 6.1 for Personal HDL Design is available now and includes HDL Author, ModelSim PE and LeonardoSpectrum Level 2 or Precision RTL and is available now starting at $15,000 for a node-locked licence.

The tool flow supports Windows 2000, XP or NT 4.0.

FPGA Advantage 6.1 for HDL Design is available now and includes HDL Designer, ModelSim SE and Precision RTL and is available now starting at $53,600 for a floating licence.

The tool flow supports Windows 2000, XP or NT 4.0; Sun Solaris 8, HP-UX 11.00 or 11.11; and Linux Red Hat 7.3.

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