Signal integrity analysis at multigigabit speeds

HyperLynx 7.0 is the latest version of the powerful and easy-to-implement toolsuite for pre- and post-layout signal integrity (SI) simulation and analysis.

HyperLynx 7.0 is the latest version of the powerful and easy-to-implement toolsuite for pre- and post-layout signal integrity (SI) simulation and analysis.

The HyperLynx tools address the challenges caused by the increasing clock frequencies of integrated circuits (ICs) on high-speed digital PCBs that can create degraded digital signals.

Compatible with all major PCB layout environments, the HyperLynx 7.0 tool allows PCB hardware designers to predict and eliminate SI, crosstalk and electromagnetic compliance (EMC) errors earlier in the design cycle, eliminating costly layout, prototype and test cycles.

Mentor is offering two versions: the HyperLynx EXT tool for mainstream designs with clock frequencies under 500MHz, and the HyperLynx GHz tool for multigigabit designs.

The HyperLynx EXT 7.0 tool includes many new user-requested features, such as new impedance planning technology, the addition of a spreadsheet-based stackup editor, expanded capabilities for differential signals and IBIS enhancements.

The HyperLynx GHz 7.0 tool also features support for multigigabit signals, Spice models and eye diagrams.

"PCB design engineers are being required to minimise both their development and production costs, while meeting increasingly tough timing specifications", said Austin Lesea, Principal Engineer at Xilinx.

"For the 3.125Gbit/s speeds that our RocketIO technology enables, proper signal integrity analysis will deliver a robust design with the fewest number of board spins and the highest PCB production yields.

This new version of the HyperLynx tool makes it easier for users of our RocketPHY and Virtex-II Pro families to achieve these important goals".

As emerging high-speed, asynchronous, serial bus standards such as PCI Express, HyperTransport, RapidIO, InfiniBand and XAUI are adopted, SI is becoming more critical and at the same time, more complex to analyse.

In addition to classic SI problems like overshoot, undershoot, ringing and timing, these designs require that hardware engineers analyse many other factors, adhering to extensive manufacturer specifications that outline technology-specific loss budgets, and bit-error rate (BER) requirements.

"The fast speeds of today's ICs require that every hardware designer do some level of SI analysis.

In addition, many PCB designers are facing significantly different SI challenges as they incorporate ASICs and FPGAs based on the latest serial bus architectures", said Joe Dalton, Director of Marketing, Systems Design Division, Mentor Graphics.

"The HyperLynx EXT tool is well-known for being a reasonably priced, easy-to-use tool for traditional SI analysis.

With the HyperLynx GHz tool, customers will be able to quickly analyse multigigabit designs, using the same familiar, user-friendly interface they have been accustomed to".

The line loss associated with signals in the gigabit range necessitates the analysis of intersymbol interference (ISI) and simulation with "eye diagrams", a visual representation of simulation results based on a long, multicycle bit sequence.

Varying the bit sequence facilitates detection of problems in signal quality, producing waveforms that, ideally, resemble the human eye.

The degree to which the centre of the eye appears open at the receiver IC is a key factor in judging the signal's effectiveness.

The HyperLynx GHz tool is able to model and analyse high-speed effects, and to show their impact on individual waveforms as well as in eye diagrams.

In addition to eye diagram capability, the HyperLynx 7.0 tool includes new features and enhancements for painlessly setting up multigigabit Spice simulations, advanced modelling and frequency-dependent transmission line analysis, multibit stimulus and jitter.

Additional ease of use and productivity enhancements, such as the new stackup editor, allow users to view design data in spreadsheet and graphical format, and edit stackup data using a spreadsheet-based, customisable editor.

This is further enhanced with a single-ended and differential-impedance planning tool.

New functionality in the HyperLynx 7.0 tool also includes support for differential terminations in Terminator Wizard and the product's Quick Terminator feature, and enhancements to the Visual Ibis Editor.

"Beyond the digital backplane speed barrier at 1Gbit/s, the prediction and management of high-frequency lossy phenomena becomes extremely important.

Survival in the new world of high-speed design depends on the quality of one's tools", said Dr Howard Johnson, President of Signal Consulting, and author of the popular text "High-speed digital design: a handbook of black magic".

The HyperLynx tool is compatible with each of Mentor's PCB design flows: the BoardStation, Expedition and PADS tools; and with PCB layout tools from Cadence, Altium and Zuken.

The Mentor Graphics HyperLynx and ICXR SI analysis tools can be used in conjunction with the Tau timing analysis product for complete system and PCB verification capability.

The HyperLynx 7.0 tool is available immediately with entry pricing starting at $4000 and fully functioned at $17,500.

The HyperLynx EXT 7.0 tool is available as a free upgrade to existing HyperSuite EXT tool customers with maintenance agreements in place.

More information, including a free high-speed design tutorial and software demonstration, is available on the Mentor Graphics website.

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