Advantage of integration for Xilinx designers

Mentor Graphics has collaborated with Xilinx to provide seamless operation between its FPGA Advantage design environment and Xilinx's recently announced Integrated Software Environment 6.1i.

Mentor Graphics has collaborated with Xilinx to provide seamless operation between its FPGA Advantage design environment and Xilinx's recently announced Integrated Software Environment 6.1i.

FPGA Advantage, Mentor's FPGA design environment incorporates the Mentor Graphics HDL Designer Series design management environment, the ModelSim simulator, the LeonardoSpectrum and Precision synthesis tools.

Integrated with Xilinx's new ISE 6.1i tools, FPGA Advantage delivers a complete FPGA flow that redefines the standard for productivity in programmable logic design software.

Both Mentor and Xilinx are committed to providing the most complete, intuitive design solution available for FPGA design.

Through their continued technology collaboration, the two companies provide designers with a comprehensive field programmable system-on-chip design environment that enhances productivity, shortens design time and reduces overall development costs.

The enhanced FPGA design flow includes hardware and software design creation and verification environments with synthesis, design management, timing analysis and place and route capabilities.

This design suite, coupled with Xilinx flagship Virtex-II Pro platform FPGAs and 90nm/300mm Spartan-3 low-cost FPGAs, creates the most cost-effective hardware/software solution available in logic design today.

"Mentor Graphics, as the leading vendor of FPGA design software, understands the difficulties of today's complex FPGAs.

With the increasing number of complex design starts, designers need an environment that allows them to rapidly create and debug a design, and achieve timing closure.

Mentor provides customers superior point tools as well as a complete, integrated solution for FPGA design that answer this challenge", said Simon Bloch, General Manager of Mentor Graphics design creation and synthesis division.

"With close co-operation between Xilinx and Mentor, our ISE 6.1i integration enables customers to take advantage of both the power of the FPGA Advantage design environment and key ISE's features, such as the Xilinx place and route, timing analyser, and power analysis features.

This integration reduces learning curves and accelerates time to productivity".

"Our continued collaboration enables us to support a complete front-to-back design flow that accelerates the creation of FPGA designs and yields substantial advantages for customers", said Rich Sevcik, Senior Vice President of FPGA Products at Xilinx.

"Through our collaboration efforts, our mutual customers have access to comprehensive EDA and FPGA design solutions, alleviating many of the bottlenecks that otherwise slow design and verification.

Because FPGA Advantage and ISE 6.1i are both user-friendly, intuitive environments, designers get up and running quickly and easily and can immediately begin designing with Xilinx devices".

With FPGA Advantage, Mentor Graphics provides its industry-leading solutions for FPGA design, including HDL Designer Series for design creation, documentation and management, ModelSim for VHDL and Verilog RTL and gate level simulation and Precision Synthesis for FPGA synthesis and design analysis integrated into a complete flow for designers.

HDL Designer series provides both graphical and textual design creation that takes full advantage of Xilinx CoreGen system generators and CoreConnect cores for fast design creation and management.

In addition, with Mentor's new FPGA Boardlink, HDL Designer is tightly integrated to Mentor's PCB design tools, passing pin placement and schematic symbol information back and forth to shorten both the PCB and FPGA design processes.

The Xilinx Integrated Software Environment has also been tightly integrated into Mentor's new Precision Synthesis environment, enabling designers to run the place and route flow from within its intuitive user interface.

This includes back annotating the resulting timing and placement files to enable designers to take full advantage of Precision's advanced incremental timing analysis and resynthesis features.

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