Platform approved for IBM-Chartered process

The Calibre design-to-silicon platform has been named as an approved physical verification tool for the 90nm semiconductor process platform jointly developed by IBM and Chartered Semiconductor.

The Calibre design-to-silicon platform has been named as an approved physical verification tool for the 90nm semiconductor process platform jointly developed by IBM and Chartered Semiconductor Manufacturing.

Validation efforts were conducted as part of the IBM-Chartered cross-foundry design enablement program aimed at reducing the risks and costs of designing chips manufactured with the IBM-Chartered 90nm process.

Participation in the IBM-Chartered design enablement programme strengthens the successful history Mentor has maintained with both companies.

Combining Calibre with this effort is a natural extension to the series of collaborations between Mentor and IBM designed to ensure highest quality silicon for mutual customers.

In addition, the Calibre platform has long been the internal signoff standard at Chartered.

"Advanced physical verification tools are critical to achieving success with nanometre manufacturing processes", said Tom Reeves, Vice President, Semiconductor Products and Solutions, IBM Systems and Technology Group.

"Our design enablement programme ensures that chip designers have access to leading-edge technologies that have been validated by our internal 90nm development team".

"Performance in speed, accuracy and capacity are critical factors in the verification of today's complex SoCs".

"By providing prequalified Calibre rules files, we are giving designers a quicker, more accurate path to production silicon", said Kevin Meyer, Vice President of Worldwide Marketing and Services at Chartered.

"The validation of Calibre for physical verification is yet another significant step by IBM and Chartered to further expand the design ecosystem for our 90nm process platform".

"Our relationship with both IBM and Chartered enables us to quickly provide our mutual customers with solutions to attain their design goals", said Joe Sawicki, Vice President and General Manager of the Design-to-Silicon Division at Mentor Graphics.

"Our market-leading Calibre design-to-silicon platform provides production-proven solutions to successfully move designs to silicon in nanometre technologies".

CMOS 9SF 90nm technology files and models for Calibre DRC, Calibre LVS and Calibre xRC are now available.

These offerings exploit the most advanced physical verification and parasitic extraction capabilities of the Calibre design-to-silicon platform.

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