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Design and Development Software
News Release from: Mentor Graphics UK
Edited by the Electronicstalk Editorial
Team on 14 July 2006
Award for Design-for-Test Team
Mentor Graphics Design-for-Test Team Awarded IEEE CEDA Donald Pederson Best Paper Award.
Mentor Graphics Corporation has announced that a team from its Design-for-Test (DFT) Division has been awarded the prestigious 2006 IEEE Circuits and Systems Society Donald Pederson Best Paper Award The award, given for the team's ground-breaking work on Embedded Deterministic Test (EDT), honors the best paper published in the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
This article was originally published on Electronicstalk on 21 Feb 2001 at 8.00am (UK)
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The DFT team: Janusz Rajski, Jerzy Tyszer, Mark Kassab, and Nilanjan Mukherjee, developed the EDT technology to provide a significant reduction in scan test data volume and scan test time.
The new technology is composed of two complimentary parts: hardware that is embedded on chip, and new deterministic ATPG methods that generate highly compressed patterns that utilize the embedded hardware.
The patented EDT technology was commercialized in 2001 with the introduction of TestKompress, the industry's first embedded compression tool.
Since its introduction, TestKompress has been used in the design of hundreds of semiconductor products including processors, communications devices, automotive electronics and consumer products.
It's estimated that EDT patterns have tested over a billion devices worldwide in the five years that TestKompress has been on the market.
"This award is an excellent example of the continuous innovation that has been taking place at Mentor Graphics over the last 25 years," said Robert Hum, vice president and general manager of the Design Verification and Test Division of Mentor Graphics.
"Breakthrough innovation of this kind moves the state of the art in the industry forward to solve the serious test challenges presented at the deep submicron level".
Janusz Rajski will be presenting the work as part of the distinguished speaker series at the Design Automation Conference in San Francisco on July 24th.
This will be the second TCAD Best Paper Award for Dr Rajski, who also received one with Jagadeesh Vasudevamurthy in 1993 for their breakthrough work on logic synthesis.
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