Visit the National Instruments web site
Click on the advert above to visit the company web site

Product category: Design and Development Software
News Release from: Mentor Graphics UK
Edited by the Electronicstalk Editorial Team on 20 September 2006

Low-power spec becomes open industry
standard

Request your FREE weekly copy of the Electronicstalk email newsletter. News about Design and Development Software and more every issue. Click here for details.

Mentor Graphics has donated its Power Configuration File specification and guidelines for modelling power-aware cells to Accellera's Unified Power Format Technical Subcommittee.

Mentor Graphics has donated its Power Configuration File (PCF) specification and guidelines for modelling power-aware cells to Accellera's Unified Power Format (UPF) Technical Subcommittee, the organisation for electronic design industry standards "Designers have been adding more logic to reduce power consumption in today's complex designs and verifying the functionality is critical", stated Robert Hum, Vice President and General Manager of Mentor Graphics Design Verification and Test Division

"Mentor has been working with key customers in this area, and they have urged us to donate our PCF specification and guidelines to Accellera to provide an open industry standard for low power verification solutions".

The Mentor Graphics technology allows the concise specification of a design's low power architectural intent separate from the Register Transfer Level (RTL) HDL code.

This innovative approach to low power specification facilitates the reuse of IP blocks by eliminating the need to modify and fully reverify RTL blocks due to changes only in the power architecture.

The modelling guidelines also ensure gate level power-aware cells are used appropriately in dynamic and formal verification.

Mentor's PCF specification includes power-aware modelling guidelines for power aware cells, such as retention registers and latches, isolation cells, level shifters and retention memories.

These ensure that power-aware functionality accurately reflects design intent and is consistently verifiable at RTL and gate-level using dynamic and static verification techniques.

"Managing power is a major focus in the electronics industry and we applaud Mentor's timely donation to Accellera", stated Shrenik Mehta, Accellera Chairman.

"Mentor's power-aware specification and verification technology uncover design issues before synthesis, and the fact that this technology is actually proven by its customers makes this donation particularly valuable as an open standard".

The Accellera Unified Power Format (UPF) was formed by active participation from the design community, EDA suppliers and standards bodies.

The charter of the UPF Technical Subcommittee is to deliver an industry-wide standard for low power design.

Open to everyone without requiring nondisclosure agreements or proprietary licences, the UPF Technical Subcommittee is inclusive - all parties are invited to participate and donate technology to the standard.

The UPF standard is expected to be produced by January 2007.

Mentor Graphics UK: contact details and other news
Email this article to a colleague
Register for the free Electronicstalk email newsletter
Electronicstalk Home Page

Search the Pro-Talk network of sites

Visit the National Instruments web site