Tools to verify complex mixed-signal chip designs

Leading international chip companies make use of design verification software

STMicroelectronics and UMC have both made use of Mentor Graphics' ADVance MS (ADMS) mixed-signal verification platform in the design of their products.

ADMS is a scalable platform that has been built for mixed-signal functional verification.

The platform integrates a suite of simulation tools, Eldo, Eldo RF, and ADiT for transistor-level simulation, as well as Questa for logic-level simulation.

ADMS provides versatile capabilities that enable designers to verify that their designs are correct in either a digital-centric or analogue-centric design flow.

Portable consumer electronics and wireless products have become the dominant force in today's global electronics market.

Relentless demand for new features and functions in these devices is driving unprecedented integration of RF, analogue, and mixed-signal applications.

This trend toward AMS SoC integration requires the ability to verify designs at the full chip level with special attention to digital and analogue interactions.

UMC, a world-leading semiconductor foundry, verified a complete transceiver reference design that included a combination of design representations such as digital languages, analogue mixed-signal behaviour languages, SPICE models and fast SPICE models (ADiT) by making use of the seamless integration of various simulation engines offered via the ADMS platform.

"We successfully validated a full chip mixed-signal transceiver reference design in our 130nm mixed-signal process using Mentor's ADMS technology", says Patrick Lin, Chief SoC Architect, System and Architecture Support, UMC.

"With the combination of our reference design and the ADMS methodology, we are providing our mixed-signal customers another approach to achieve shorter time to market with our advanced mixed-signal processes".

"The combined methodology is slated to be demonstrated in a series of events starting with a demo at DAC 2007".

Nanometer mixed-signal designs increasingly exhibit analogue behavior.

Battery-powered portable device types bring additional complexity because of the fluctuation in power supply.

These challenges have rendered traditional fast-SPICE tools inadequate for verification purposes.

The latest breakthrough in the ADMS verification platform is ADiT, a fast-SPICE simulator developed and optimised specifically for nanometer mixed-signal applications such as PLL, DLL, DAC, ADC, LDO, and SERDES.

"ADiT delivers excellent convergence and the performance required for our low-power wireless applications".

"Especially, the near out-of-box accuracy of ADiT reduces the effort for tuning the simulator and increases overall productivity", says Christian Caillon, Components Development Director, Cellular Terminal Division, STMicroelectronics".

"The efficient integration into ADMS also provides a seamless transition into our mixed-signal, full chip verification methodology".

"We are delighted that our customers achieved design success with our verification technologies", says Jue-Hsien Chern, Vice President and General Manager, Deep Submicron Division, Mentor Graphics".

"Through close collaboration with our partners, we have developed leading edge technologies for AMS SoC design".

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