Product category:
Analogue and Mixed Signal ICs
News Release from: Micrel | Subject: SY87725L
Edited by the Electronicstalk Editorial
Team on 06 June 2007
Serdes supplies flexibility in optical
networking
Single-chip programmable serdes supports multiple passive optical network standards and rates including asymmetric gigabit passive optical networking.
New from Micrel, the SY87725L is a single chip programmable serdes that supports multiple passive optical network (PON) standards and rates including asymmetric gigabit passive optical network (GPON) with datarates up to 2.5Gbit/s on the receive side and 1.25Gbit/s on the transmit side This product offers complete clock recovery and data retiming circuitry, along with an integrated 4bit serial-to-parallel data convertor, on the receive side
This article was originally published on Electronicstalk on 5 Dec 2000 at 8.00am (UK)
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On the transmit side, it also includes a synthesiser with an integrated 4bit parallel-to-serial data convertor.
The device is targeted at BPON/GPON/GEPON/EPON applications in the growing fibre-to-the-home and fibre-to-the-premises markets.
The SY87725 is currently available in volume and is priced at US $9.95 for 1000-unit quantities.
An evaluation board is also available.
"The SY87725L serdes manages all the high frequency signals in an ONU (optical network unit) and is an ideal low-cost solution for a programmable or upgradeable ONU when pairing with a low cost FPGA", says Thomas S Wong, Vice President High Bandwidth Products for Micrel.
"With the flexibility of the transceiver and the low cost of a FPGA, our customers can provide ONU solutions only limited by their imaginations".
The SY87725L has a 4bit interface and a double datarate option is included to reduce the clock frequency.
This allows the use of the lowest cost FPGA without a significant increase in I/O pins.
This device also features a novel auto-align circuit that further simplifies the critical timing requirement.
The part operates on a single 3.3V supply with 1W typical power consumption.
The parallel 4bit input/output interfaces feature LVDS I/O.
It is available in lead-free (10 x 10mm) 64-pin and EPAD-TQFP package options.
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