Product category:
Communications ICs (Wired)
News Release from: Zarlink Semiconductor | Subject: ZL30462
Edited by the Electronicstalk Editorial
Team on 14 April 2003
Timing module has it all for high-speed
line cards
Zarlink Semiconductor has launched the industry's most compact, fully featured timing module for high-speed line cards in network access equipment.
Zarlink Semiconductor has launched the industry's most compact, fully featured timing module for high-speed line cards in network access equipment By integrating a complete timing system into a component the size of a postage stamp, Zarlink's off-the-shelf ZL30462 module helps network equipment companies cut design costs and speed time-to-market
This article was originally published on Electronicstalk on 7 Feb 2001 at 8.00am (UK)
Related stories
Packet processor for broadband networks
Mitel Semiconductor has introduced the world's highest density AAL2 segmentation and re-assembly (SAR) device.
Quality of service is key to Gigabit Ethernet ICs
The MVTX2800 family of Gigabit Ethernet switching ICs from Zarlink Semiconductor deliver full-wire speed forwarding and leading quality of service features to metropolitan optical access equipment.
Timing systems on access line cards generate and synchronise clocking signals used by other devices on the boards, including framers, switches, and optical line interface chips.
Manufacturers have traditionally designed timing systems in-house using discrete chips and other components.
However, many line cards are now being equipped with high-speed network interfaces, or uplinks, to handle rising traffic volumes at the network edge.
Further reading
Chipset saves space, cuts costs for TDMA handsets
Zarlink Semiconductor has announced a new highly integrated RF chipset for cellular handsets operating in dual-mode TDMA/AMPS networks.
First AAL1 device to perform on-chip ATM switching
Zarlink Semiconductor claims the MT90503 is the industry's highest density AAL1 segmentation and reassembly (SAR) chip for TDM to ATM conversion.
Ultra-low-power process aims for low-voltage SoCs
Zarlink Semiconductor has expanded its foundry services with a new ultra-low-power analogue nonvolatile 0.35-micron CMOS process optimised for low-voltage (1V) and low-power applications.
Operating at 155Mbit/s, these STM-1/OC-3 interfaces increase the complexity, size, and cost of timing designs, resulting in growing demand for highly reliable commercial timing products.
Zarlink's ZL30462 module meets this need by combining digital and analogue PLL (phase-locked loop) technology and a 20MHz master oscillator into one small timing component.
The richly featured module offers the industry's widest range of clock frequencies - including two high-speed, jitter-attenuated outputs, and flexible dual inputs - in a footprint half the size of timing systems based on discrete devices.
"The ZL30462 is the first timing module that handles the unique clocking requirements of the industry's new generation of high-speed access line cards", said Marcia Jervis, Product Line Marketing Manager, Timing Modules, Zarlink Semiconductor.
"The world-leading performance, flexibility, and size of the module reflect Zarlink's multidisciplinary expertise in analogue, digital, and timing circuit design".
The module is suitable for line cards in a range of SDH/Sonet edge equipment, including media gateways, add/drop multiplexers, uplink systems, and edge switches.
It can also be used in master timing cards for SDH access equipment.
Zarlink's ZL30462 timing module generates the industry's broadest range of clocking frequencies, including the high-speed, jitter-attenuated, 155.52MHz LVPECL output required by many STM-1/OC-3 optical line interface chips and framers.
This native LVPECL output helps designers save board space by eliminating the need for external logic translation circuits.
The ZL30462 also produces a jitter-attenuated, 19.44MHz CMOS clock, two 8kHz frame pulses, and clocks operating at 2.048, 8.192 and 16.384MHz.
The inputs of Zarlink's new module are highly flexible.
The component accepts frequency references from two independent sources, and each input can be programmed for operation at 8kHz, 1.544MHz, 2.048MHz or 19.44MHz.
To enhance system integrity, the ZL30462 is equipped with advanced reliability features, including time-interval error correction, and automatic holdover.
If the primary input reference becomes unstable, the holdover circuitry maintains network synchronisation while the chip automatically switches to the secondary reference.
The ZL30462 supports free-run and locked modes, has low intrinsic jitter and wander, and is fully compliant with the network synchronisation requirements of Telcordia's GR-1244-CORE standard for Stratum 4E clocks.
All module programming is controlled by easy-to-use, hardware-based functions.
Zarlink's ZL30462 timing module is now in volume production.
The module is offered in a 40-pin DIL (dual inline) ceramic SMT package measuring only 2.54 x 2.54cm - the smallest footprint in its class.
In quantities of 100, the module is priced at US $101.05.
• Zarlink Semiconductor: contact details and other news
• Email this article to a colleague
• Register for the free Electronicstalk email newsletter
• Electronicstalk Home Page
Search the Pro-Talk network of sites
