Product category:
Communications ICs (Wired)
News Release from: Zarlink Semiconductor | Subject: ZL30461
Edited by the Electronicstalk Editorial
Team on 16 December 2003
Standards-compliant timing module crams
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The ZL30461 is billed as the industry's smallest, most fully featured timing product for central timing cards in Sonet/SDH systems that provide clocking frequencies up to 155.52MHz.
The ZL30461 is billed as the industry's smallest, most fully featured timing product for central timing cards in Sonet/SDH systems that provide clocking frequencies up to 155.52MHz Designing highly reliable timing devices for central timing cards that comply with stringent Sonet/SDH standards for network timing and synchronisation is a key challenge for communications equipment makers
This article was originally published on Electronicstalk on 7 Feb 2001 at 8.00am (UK)
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The module offers 14 output clocks - the industry's widest range of clocks for Sonet/SDH timing cards - without requiring external components or complex programming.
"In-house design and testing of timing and synchronisation devices is often a costly, time-consuming process", said Darren Ladouceur, Marketing Manager, Timing and Synchronisation, Zarlink Semiconductor.
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"Our ZL30461 module is a full-function, off-the-shelf device that meets worldwide standards for central timing cards".
Equipment vendors are evaluating the ZL30461 module for Sonet/SDH central timing cards used in DSLAMs, media gateways, add/drop multiplexers, Internet routers, and network access equipment.
The module can also be used on line cards in network element equipment.
Coupled with the ZL30462 timing module for Stratum 4 and STM-1 applications, Zarlink now offers modules for both line cards and central timing cards in Sonet/SDH equipment.
The ZL30461 device is a system-in-package module measuring 23 x 23mm - the smallest footprint in its class, and approximately 75% smaller than competing products.
Zarlink's module complies with Telcordia's GR-253-Core standard for Sonet Stratum 3, GR-1244-Core standard for Stratum 3, and the ITU-T's G.812 and G.813 Option 1 and 2 standards for SDH equipment clocks (SEC).
The module exceeds OC-12/STM-4 jitter requirements at rates typically less than 7ps RMS.
To ensure the level of reliability necessary for central timing cards, the ZL30461 module offers "hitless" reference switching and holdover.
The device monitors both input references, and if the primary input is interrupted the module enters holdover mode, generating its own reference clock based on data collated from past reference signals, while verifying the integrity of the secondary reference.
If the secondary reference is also corrupted, the module can maintain holdover for over 24 hours, a common system requirement that allows service providers to maintain service while problems are resolved.
Delivering 14 output clocks, Zarlink's highly flexible ZL30461 module produces two ultra-low-jitter clocks - a 77.76MHz LVPECL (low-voltage pseudo emitter-coupled logic) clock, and a 19.44MHz CMOS clock - as well as jitter-attenuated clocks operating at 1.544, 2.048, 4.096, 6.312, 8.192, 34.368/44.736 and 155.52MHz.
The module also produces three STbus-compatible 8kHz frame pulses.
The inputs of the timing module accept frequency references from two independent sources programmable for operation at 8kHz, 1.544MHz, 2.048MHz or 19.44MHz.
Zarlink's ZL30461 timing module is in volume production.
In quantities of 1000, the module is priced at US $164.00.
The device is offered in a 240-pin BGA package measuring 23 x 23mm.
A reference board is available for testing and evaluation.
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