Product category:
Communications ICs (Wired)
News Release from: Zarlink Semiconductor | Subject: ZL50021 family
Edited by the Electronicstalk Editorial
Team on 23 February 2004
TDM switching family integrates Stratum
3 timing
A new family of nine low- to mid-density TDM/TSI switches features the industry's widest range of programmable and integrated features.
A new family of nine low- to mid-density TDM/TSI switches features the industry's widest range of programmable and integrated features, delivering performance advantages and driving down costs in wired and wireless network equipment Communications networks are evolving from a circuit-switched to packet switched infrastructure, allowing service providers to offer profitable new services and lower their operating costs
This article was originally published on Electronicstalk on 7 Feb 2001 at 8.00am (UK)
Related stories
Packet processor for broadband networks
Mitel Semiconductor has introduced the world's highest density AAL2 segmentation and re-assembly (SAR) device.
Quality of service is key to Gigabit Ethernet ICs
The MVTX2800 family of Gigabit Ethernet switching ICs from Zarlink Semiconductor deliver full-wire speed forwarding and leading quality of service features to metropolitan optical access equipment.
This evolution to a packet switched network is expected to occur over several decades.
Accordingly, designers require more flexible TDM switches optimised for use in networking equipment that must handle both packet- and circuit-switched services.
For example, IP-PBXs (Internet Protocol-private branch exchanges) that support enterprise VoIP services require TDM technology to interface with the circuit-switched PSTN.
Further reading
Chipset saves space, cuts costs for TDMA handsets
Zarlink Semiconductor has announced a new highly integrated RF chipset for cellular handsets operating in dual-mode TDMA/AMPS networks.
First AAL1 device to perform on-chip ATM switching
Zarlink Semiconductor claims the MT90503 is the industry's highest density AAL1 segmentation and reassembly (SAR) chip for TDM to ATM conversion.
Ultra-low-power process aims for low-voltage SoCs
Zarlink Semiconductor has expanded its foundry services with a new ultra-low-power analogue nonvolatile 0.35-micron CMOS process optimised for low-voltage (1V) and low-power applications.
Similarly, TDM devices are needed in media gateways and wireless base stations for seamlessly transferring voice, data and multimedia traffic between legacy and emerging networks.
Zarlink has responded to customer requirements by completely updating its TDM/TSI nonblocking switching portfolio, recently introducing four high-density, eight medium-density, and today nine low- to mid-density TDM switches.
The ZL50021 switching family includes the first commercially available 2 and 4K devices to integrate a Stratum 3 digital PLL in a monolithic integrated circuit.
"By combining switching with timing and other performance features, our low- and mid-density switches offer significant benefits for platforms delivering converged services", said Kam Aite, Product Line Marketing Manager, TDM/TSI Switching, Zarlink Semiconductor.
"Integrated features such as per-channel A-Law/u-Law translation, per-stream rate conversion and bit error rate test circuits, and a Stratum 3 DPLL with low intrinsic jitter, eliminate the need for external components, making designs simpler and less costly".
Zarlink's premier ZL50021 saves design and component costs - and reduces board space requirements by up to 50% - by combining the functionality of over five components and programmable logic devices in a single monolithic integrated circuit.
The ZL50021 family comprises three 4096 channel, three 2048 channel, and three 1024 channel switches with up to 32 inputs and 32 outputs or 32 bidirectional streams for interfacing with peripheral components at data rates from 2 to 16Mbit/s.
With a range of performance options, the switches support the cost-effective design of low-bandwidth equipment, such as remote access servers and concentrators, IP-PBXs, small media gateways, wireless basestations, and digital loop carriers.
The ZL50021 family's premier 2 and 4K switches are the industry's first commercially available devices with an integrated DPLL meeting Telcordia's Stratum 3 specification (GR-1244-CORE).
With jitter tolerance less than 1ns the integrated DPLL ensures precise network timing and synchronisation.
The premier 1K device includes an integrated Stratum 4E DPLL.
Competing devices provide on-chip timing that does not meet the jitter performance of the ZL50021 devices, or require an external analogue PLL to ensure accurate timing.
Zarlink's integrated DPLL provides four independent reference source inputs selectable from 8kHz, 1.544MHz, 2.048MHz, 4.096MHz, 8.192MHz, 16.384MHz and 19.44MHZ, combined with holdover mode performance to ensure data are accurately aligned with the rest of the system.
The DPLL generates multiple frame pulses of 31, 61, 122 and 244ns and six clock timing outputs out of 1.544, 2.048, 4.096, 8.192, 16.384, 19.44 and 32.768MHz.
The ZL50021 family's premier 1, 2 and 4K devices include unrivalled features that boost equipment performance while lowering board-level design costs and complexity.
With programmable per-stream data rate conversion circuitry, the devices can directly transmit information between peripheral components operating at different speeds - without requiring external components to perform rate conversion.
Rate conversion technology provides flexible bandwidth allocation capability, allowing designers to select data rates on a per-stream basis to seamlessly interconnect new high-speed peripheral equipment with slower legacy equipment.
Most competing devices require external circuitry to accommodate equipment operating at different datarates, adding to design costs and complexity.
The ZL50021 TDM family includes the industry's only low- to mid-density devices with per channel ITU-T G.711 PCM A-Law/u-Law translation, eliminating the need for external components to convert between voice standards.
With integrated per-stream BER testing complying with ITU-0.151, designers can simultaneously test all input/output streams.
Other devices require external testing equipment, and can only test on a time-consuming channel-by-channel basis.
With reference monitoring capability that meets Telcordia GR-253-CORE clock monitoring requirements, the ZL50021 devices monitor the quality of the four DPLL input references.
Fast lock performance allows the DPLL to lock onto a signal in less than 2s, thereby increasing the use of the system at power-up and speeding manufacturing test times.
Integrated software control mode (programmable target frequency offset) means the phase detector can be implemented in software, providing efficient synchronisation for TDM-over-IP applications.
All devices in the ZL50021 low-density TDM switching family are pin-to-pin compatible.
Designers can easily migrate to any device within the family without replacing the entire circuit board as network traffic demands increase or new customer services are deployed.
Going forward, Zarlink is continuing to evolve its TDM switching portfolio to deliver enhanced performance across its high-, mid- and low-density products.
The ZL50021 switching family is available now.
The devices are offered in 17 x 17mm, 256-ball PBGA and 28 x 28mm, 256-pin LQFP packaging.
• Zarlink Semiconductor: contact details and other news
• Email this article to a colleague
• Register for the free Electronicstalk email newsletter
• Electronicstalk Home Page

