Product category:
Communications ICs (Wired)
News Release from: Zarlink Semiconductor | Subject: ZL30108
Edited by the Electronicstalk Editorial
Team on 08 December 2004
Digital PLL shrinks for optical line
cards
The ZL30108 is billed as the world's smallest digital PLL for optical line cards operating at rates up to OC-3/STM-1.
The ZL30108 is billed as the world's smallest digital PLL for optical line cards operating at rates up to OC-3/STM-1 The device delivers unparalleled features in a tiny footprint for the carrier-class transport of voice, data and multimedia traffic across high-speed networks
This article was originally published on Electronicstalk on 7 Feb 2001 at 8.00am (UK)
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Measuring just 5 x 5mm, the ZL30108 DPLL addresses dense line card "real estate" constraints.
The device may be used in combination with Zarlink's family of analogue PLLs to provide an end-to-end timing and synchronisation solution for higher-speed Sonet/SDH networking equipment.
For example, the ZL30108 DPLL and ZL30415 analogue PLL provide an easy-to-implement, compact solution for OC-12/STM-4 line cards.
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"The ZL30108 timing chip is the 'total package' in the industry's smallest footprint".
"It combines features such as jitter filtering and hitless reference switching and delivers optimised performance when used with a Zarlink analogue PLL, together with jitter capabilities to meet OC-3/STM-1 requirements", said Darren Ladouceur, Marketing Manager, Timing and Synchronisation, Zarlink Semiconductor.
"Competing devices do not provide the same mix of performance and features, and none equal its extremely small size".
Major equipment manufacturers have already selected the ZL30108 DPLL for design into routers and multiservice access platforms.
The ZL30108 DPLL provides high-performance line card synchronisation that surpasses all OC-3/STM-1 specifications, with integrated features including reference monitoring, reference switching, automatic holdover, and jitter filtering and shaping.
The device accepts two input references, synchronising to 8kHz, 2kHz, 1.544MHz, 2.048MHz, 8.192MHz, 16.384MHz or 19.44MHz reference input frequencies.
Each input is continuously monitored for frequency accuracy and pulse quality.
The ZL30108 chip allows designers to monitor references using an inexpensive 20 or 32ppm crystal oscillator.
When a problem is detected in the reference clock, the device's reference switching capability enables systems to switch between timing references to avoid service interruption.
If the network synchronisation source is temporarily lost, the ZL30108 digital PLL switches automatically into holdover mode, and continues to generate output clocks based on data collected from past reference signals.
The DPLL delivers exceptional holdover performance, with frequency accuracy of 0.01ppm.
The ZL30108 chip provides a 19.44MHz (Sonet/SDH) clock output with jitter performance of better than 24ps RMS, delivering significant jitter margin compared with OC-3/STM-1 specifications.
The device also produces an 8kHz framing pulse and 2kHz multiframe pulse with less than 0.5ns peak-peak intrinsic jitter.
With the rollout of increasingly complex network architectures and higher-speed transmission systems, designers must use combinations of digital and analogue PLLs that work in tandem to deliver superior timing functionality and performance that meets the demands of carrier-grade equipment.
Typical DPLLs produce wideband phase noise across all frequencies, increasing the filtering demands on adjacent analogue PLLs and degrading overall jitter performance.
Zarlink's innovative jitter shaping technique effectively filters low-frequency phase noise, allowing designers to focus the analogue PLL on its core attribute - eliminating high-frequency phase noise.
Using this patented technique, jitter from the ZL30108 DPLL can be shaped so that it produces lower jitter, or is easily filtered by a Zarlink analogue PLL for higher frequency applications.
The ZL30108 DPLL generates low-jitter output clocks that meet Telcordia GR-253-Core jitter specifications for OC-3 and comply with the ITU-T G.813 STM-1 specifications.
The ZL30108 chip is in volume production, and offered in a 5 x 5mm, 32-pin QFN package.
In 1000-off quantities, the device is priced at US $12.50.
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