Novel route to analogue intellectual property

The customer is able to own high performance analogue blocks on an attractive cost model compared with normal IP vendor arrangements.

A new initiative from semiconductor design specialist Moortec aims to bring high-performance analogue and mixed-signal IP, in particular low-jitter PLL designs, to UK and European customers.

"There is a high demand for challenging analogue/mixed-signal IP from semiconductor OEMs and startups, particularly from those engauged in complex, largely digital SoC developments on 65nm and 90nm technologies", explains Moortec's Managing Director, Steve Crosher.

"Our 'route2IP' initiative allows SoC developers to gain high performance analogue block functions, such as low jitter PLLs, while retaining IP and internal reuse rights".

Since its inception in May 2005, Moortec has provided mixed-signal IP blocks for consumer, medical and automotive applications.

With 'route2IP' Moortec offers an alternative to the common IP delivery model used by IP vendors.

"We're very excited about 'route2IP', as it allows our world-class PLL design experts to work closely with those customers targeting designs at cutting edge geometries", continues Crosher.

"The scheme will run alongside our established design services model which has been offered since startup".

'route2IP' offers a commercial arrangement whereby the IP will be shared between vendor and customer.

Under the terms of the collaboration the customer is able to own high performance analogue blocks on an attractive cost model compared with normal IP vendor arrangements.

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