Product category:
Boards and Backplanes
News Release from: Molex UK | Subject: GbX reference backplane demonstrator
Edited by the Electronicstalk Editorial
Team on 24 September 2004
Reference backplain aids high-speed
system design
The GbX reference backplane demonstrator helps chip and system designers predict a component's full performance ability in an actual datacomms or telecomms system.
Molex reckons its GbX reference backplane demonstrator has reached new heights in helping chip and system designers predict a component's full performance ability in an actual datacomms or telecomms system The Molex GbX reference backplane and PMC-Sierra 6G QuadPHY serdes constitute the industry's first 1m silicon-to-silicon channel to be compliant with the Optical Internetworking Forum (OIF) Common Electrical I/O (CEI) 6+ Long Reach specification (Draft 4.0)
This article was originally published on Electronicstalk on 26 Jan 2001 at 8.00am (UK)
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Launched in February 2004, the GbX reference backplane demonstrator enables design engineers to manipulate several key design variables that greatly influence the transmission quality from transmitter to receiver at three standard channel lengths (0.2, 0.6 and 1.0m) in a variety of industry standard and nonstandard configurations.
It is well suited for a variety of backplane design applications, including: internetworking equipment (servers, hubs and routers); telecommunications equipment (central office, cellular infrastructure and multiplatform service systems); medical diagnostic equipment; and test and measurement equipment.
In addition to predicting transmission quality, Molex's GbX reference backplane demonstrator provides multiple interface launch technologies to optimise a compliant pin connector's performance at speeds up to and above 6Gbit/s.
It demonstrates the launch performance between PCBs and connectors, as well as semiconductors and PCBs.
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