Product category:
PCB Connectors
News Release from: Molex UK
Edited by the Electronicstalk Editorial
Team on 11 April 2006
Novel technology looks beyond 10Gbit/s
Novel Channel Margin technology from Molex takes a fresh approach to demonstrating channel performance in serial system designs for 10Gbit/s and beyond.
Novel Channel Margin technology from Molex takes a fresh approach to demonstrating channel performance in serial system designs for 10Gbit/s and beyond Unlike channel demonstrators that highlight a given channel operation for a particular length and unique set of conditions, it uses an interactive hardware and simulation tool to characterise performance over a selected range of operating parameters to establish both function and channel robustness
This article was originally published on Electronicstalk on 26 Jan 2001 at 8.00am (UK)
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Developed as a collaborative effort by Molex, Mentor Graphics and Xilinx, the Channel Margin technology ensures robust channel operation by establishing an initial reference construction to show optimal performance.
It then introduces controlled channel degradation to determine the operating margin.
In addition to determining the parametric space for channel operation, the Channel Margin technology also establishes decremented performance across three critical parameters - insertion loss, return loss and crosstalk.
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By allowing for extensive parametric control of the reference channel, it gives system designers specific confidence levels on channel reliability, as well as a new tool set for controlling cost.
"As 10Gbit/s-plus systems are becoming a reality, system designers need to be assured that they have robust channel operation", said Gary Humbert, New Product Development Manager, Backplane Products, Molex.
"By combining Mentor Graphics' software and Xilinx's silicon for parametric evaluation with Molex's physical layer technology, we can offer system designers a complete channel development tool that provides critical information on a system's performance".
"As a result, system designers can accommodate potentially deteriorating conditions, as well as save time and applied costs".
"As system datarates continue to scale upwards, the design of reliable high-speed channels requires seamless integration of many system elements specifically; silicon devices, PCB technology, connectors and EDA tools" said Tim Hemken, Marketing Director, Xilinx.
"We are thrilled to partner with Molex and Mentor Graphics in enabling the multigigabit signalling ecosystem".
"With the challenges of designing a 10Gbit/s channel, designers need advanced analysis capabilities that come in a tool such as HyperLynx, allowing engineers to accurately model loss effects, via parameters, and produce meaningful results that allow you to go into production with confidence", according to Henry Potts, General Manager, System Design Division, Mentor Graphics Corporation.
"Our partnership with Molex and Xilinx has given us the opportunity to show the industry that 10Gbit/s channels are achievable on FR-4, and that Mentor Graphics has the predictive analysis tools to get you there".
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