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Monterey Design Systems
Please note:
This company's assets were acquired by
Synopsis in 2004
Latest articles from this company
News releases from this company
Novel technology shrinks MPEG2 codec chip die
To meet the low cost requirements of high volume markets, Toshiba turned to AFP technology to reduce the die size of its eight million gate design by 10.5%.
News from Electronicstalk, 27 July 2004
Record quarter for Monterey
Monterey Design Systems has closed a record quarter as a result of expanded orders from existing customers and the addition of several new accounts.
News from Electronicstalk, 16 January 2004
Upgrade accelerates physical implementation system
The Dolphin physical implementation system incorporates patented Monterey Progressive Refinement technology to simultaneously optimise a design for timing, power, area and signal integrity.
News from Electronicstalk, 11 November 2003
Prototyping system predicts device performance
Calypso is the industry's first silicon virtual prototyper to combine hierarchical design planning and silicon performance estimation in a single, integrated tool.
News from Electronicstalk, 11 November 2003
Virtual prototyping speeds Toshiba to tape-out
Toshiba Corporation has completed a multimedia SoC design using the Monterey silicon virtual prototyping (SVP) tool suite.
News from Electronicstalk, 11 November 2003
Tools cut out manual work in Spike's hat-trick
IC design specialist Spike Technologies has completed three chips using the Monterey toolsuite.
News from Electronicstalk, 6 October 2003
Unger and Buhl bring experience to board
EDA industry veteran Tim Unger and Peter Buhl of Nokia Venture Partners have joined the Monterey Design Systems Board of Directors.
News from Electronicstalk, 30 September 2003
Top-line funds queue up to support Monterey
Nokia Venture Partners and Information Technology Ventures have both made investments in Monterey Design Systems, bringing the total series II funding round to $15 million.
News from Electronicstalk, 8 September 2003
Equity funding to finance further growth
Monterey Design Systems has received $10 million in new equity funding.
News from Electronicstalk, 1 August 2003
Two more patents for Monterey
Monterey Design Systems has been issued two new patents by the United States Patent and Trademark Office, bringing the company's patent total to 14.
News from Electronicstalk, 29 July 2003
Progressive Refinement for Israeli ASICs
Avnet ASIC Israel has selected the Monterey planning, prototyping and implementation tool suite for its latest SoC designs.
News from Electronicstalk, 25 June 2003
Virtual prototyper boosts design productivity
The Calypso silicon virtual prototyping (SVP) system is built on a foundation of patented Monterey Progressive Refinement technology.
News from Electronicstalk, 6 June 2003
Programme takes physical IC design to new level
The Monterey Calypso Vanguard programme aims to address the rising cost of designing multi-million-gate chips and the severe penalties of making uninformed decisions early in the design cycle.
News from Electronicstalk, 6 June 2003
Design planner qualified for Blue Logic
The Monterey design planner has been qualified for inclusion in IBM's Blue Logic standard ASIC design methodology.
News from Electronicstalk, 4 June 2003
Set-top-box chips speed through to tape out
STMicroelectronics has taped out two production 130nm SoC designs totalling 9 million gates, proving the value of Monterey Progressive Refinement technology for multi-million-gate nanometre chips.
News from Electronicstalk, 4 June 2003
Monterey sets up R and D in Armenia
Monterey Design Systems has opened a research and development centre at Viasphere Technopark in Yerevan, Armenia under the name of Monterey Arset.
News from Electronicstalk, 15 May 2003
Progressive refinement comes to Shanghai
Monterey Design Systems will be demonstrating its entire suite of products at the China International Semiconductor and Integrated Circuit Exhibition and Seminar 2003.
News from Electronicstalk, 25 March 2003
Patent for synthesis and prototyping technology
Monterey Design Systems has been issued patent number US 6,523,161 by the United States Patent and Trademark Office, bringing the company's patent total to a dozen.
News from Electronicstalk, 17 March 2003
Switch fabric design comes in on time
Fabless semiconductor company TeraChip has successfully completed - on budget and on schedule - its first switch fabric design using the Monterey toolsuite.
News from Electronicstalk, 10 February 2003
Toolset speeds digital interface chip development
Acuid Corp has purchased the entire suite of Monterey design tools for use on chips with ultra-high bandwidth interfaces (above 100Gbit/s).
News from Electronicstalk, 7 February 2003
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