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Set-top-box chips speed through to tape out

A Monterey Design Systems product story
Edited by the Electronicstalk editorial team Jun 4, 2003

STMicroelectronics has taped out two production 130nm SoC designs totalling 9 million gates, proving the value of Monterey Progressive Refinement technology for multi-million-gate nanometre chips.

STMicroelectronics has taped out two production 130nm SoC designs totalling 9 million gates, proving the value of Monterey Progressive Refinement technology for multi-million-gate nanometre chips.

The Monterey tool suite, consisting of hierarchical design planning, physical synthesis and prototyping, and final physical implementation, is an integral part of the design flows used to complete these chips.

The larger of the two designs, an integrated single-chip set-top box solution, contains over eight million gates, 3.2Mbit of SRAM, more than 70 large macro blocks including both a 64 and a 32bit CPU core, embedded analogue macros, multiple clock domains running off a 200MHz chip-level clock, and 400 I/Os.

Monterey provided the hierarchical design planning, and physical synthesis and prototyping capabilities needed to achieve closure on critical blocks.

On the second design, die size was critical and Progressive Refinement was able to provide early feedback to the RTL designers resulting in a netlist that was optimised for density.

"The Monterey tools are unique in that they give us accurate physical information early enough in the design process to influence the front-end logic design", said Thierry Bauchon, Engineering Director, Set-Top Box Division, STMicroelectronics.

"The Progressive Refinement approach provides information that, with our previous design flow, was only available after the layout was complete.

By that point, it was too late to make major structural or logic changes.

With Monterey Progressive Refinement, we can avoid making bad early decisions that would be impossible to correct in the latter stages of the design process".

The Set-Top Box (STB) Division of STMicroelectronics is the largest vendor of set-top box and MPEG decoder chips in the world, having shipped more than 100 million units since its inception in 1995.

The division has been using Monterey planning and prototyping tools in production for over two years and has recently developed a new design flow incorporating the entire Monterey tool suite, consisting of the IC Wizard hierarchical design planner, Sonar physical synthesis and prototyper, and Dolphin physical implementation system.

"The Monterey planning and prototyping tools are very useful in accelerating timing convergence", said Francois Remond, design support and methodology manager at the Set-Top Box Division.

"The tools are very easy to use and provide very accurate results.

Also, correlation between Monterey and our internal signoff crosstalk analyser is excellent.

In addition, the detailed router has shown great improvements in handling complex 0.13-micron process rules in the latest release".

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