Product category:
Discrete Power Devices
News Release from: Freescale Semiconductor
Edited by the Electronicstalk Editorial
Team on 27 June 2002
Novel insulator promises faster MOSFET
structures
Motorola has been working with Nanjing University and the Institute of Physics of Chinese Academy of Sciences to characterise the material properties of lanthanum aluminate films.
Motorola has been working with Nanjing University and the Institute of Physics of Chinese Academy of Sciences to characterise the material properties of lanthanum aluminate films These properties make this material one of the strongest potential candidates for a new gate insulator for smaller, faster CMOS integrated circuits of the future
This article was originally published on Electronicstalk on 20 Mar 2001 at 8.00am (UK)
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By pushing out the limits of the semiconductor industry's "Moore's Law", thereby enabling continued scaling down in chip size, lanthanum aluminate (LAO) and lanthanum aluminum oxynitride (LAON) could replace silicon dioxide as a gate dielectric in mosfet devices for the 65nm technology node and beyond without requiring extensive modification of the manufacturing equipment or process flow.
This prognosis results from a two-year joint research project focused on high dielectric constant materials between Motorola and two members of China's top research community, Nanjing University and Institute of Physics of CAS.
The combination of separate, concurrent research between Motorola and each institution over this period has developed into a strategic research partnership among the three organizations.
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"This successful partnership has combined the creativity, expertise and investigative approach of two of China's top academic institutions with the market awareness and leading-edge technology of Motorola, resulting in a fast technology assessment with promising potential market impact", said Dr Louis C Parrillo, corporate vice president and chief technology officer for Motorola SPS.
"This is a great example of marrying university expertise with industry experience to evaluate a potential solution for an industry problem".
"When Motorola began its research into high dielectric constant materials several years ago, LAO and LAON were among roughly a half-dozen candidates we identified", said Joe Mogab, vice president and director of Advanced Process Development and External Research for SPS.
"Recognising that we did not have the resources to carry out a parallel evaluation of all these materials internally, we decided to extend an ongoing research relationship with Nanjing University, and to initiate a new collaboration with the Institute of Physics of Chinese Academy of Sciences.
These strategic research partnerships have allowed us to tap into a wealth of materials expertise to accelerate evaluation of these materials".
Gate dielectric film thickness scaling is one of the most urgent material problems facing the chip industry.
A new material is needed as early as two generations away from the current technology generation being used in today's products.
The industry's R and D labs are already working on 65nm process technologies - a generation that is faced with critical roadblocks to the continued scaling of mosfet devices.
"Traditional materials will last one or two more generations, whereupon the industry will need a new material to continue down the path of faster, smaller, better electronics", said Karen Guo, director of Motorola China R and D Institute and DigitalDNA Laboratories China.
"We are very excited about the potential of this material.
While more research is required, lanthanum aluminate is the most promising material we have seen".
Many materials are currently under consideration within the industry as potential replacements for silicon dioxide as the gate dielectric material for 65nm CMOS technology.
However, most of these materials, which have a dielectric constant greater than 20, either are not thermodynamically stable in direct contact with silicon, or generate diffusion problems, which cause significant degradation of device performance.
LAO and LAON demonstrate the best thermal stability among all known-possible high dielectric constant (greater than 20) materials and can also be economically integrated into a traditional CMOS process flow.
Traditional device materials reach fundamental physical limits when the scaling continues down to deep submicron levels (below 0.10 micron).
As device dimensions continue to scale down, the thickness of the silicon dioxide layer must also decrease to maintain the same capacitance between the gate and channel regions.
The 65nm generation requires a thickness of less than 2nm.
"Collaboration with international companies like Motorola aligns our research with the needs of the high technology industry and involves us in the advanced management mode of R and D", said Professor Zhiguo Liu, team leader of the Nanjing University group.
"Our partnership with Motorola also promotes the linkage of other research projects with industry and the transformation of the research results into real applications in our lab.
We are excited that the current joint research achievement may potentially impact the whole semiconductor industry and hope it can also contribute to the future development of China's microelectronics industry".
Professor Zhenghao Chen, team leader of Institute of Physics, CAS, agrees.
"This strategic partnership is a win-win research model.
Motorola is able to capture ideas and research output from the universities and turn them into industry realities.
We are able to broaden our research expertise and skills with the mentoring and guidance from Motorola scientists.
We have also learned from Motorola how to manage a research project successfully.
Such cooperation and exchanges not only help Motorola achieve its long term development goals in China, but also accelerate China's knowledge-base and facilitate the reform of traditional Chinese scientific research methodologies".
In March 1998, the Laboratory for Solid State Microstructures at Nanjing University joined with DigitalDNA Labs China to work on ferroelectric materials research.
This work laid the foundation for embarking on the next collaborative project in the area of high dielectric constant materials in May 2000.
Concurrently, another joint research project was initiated with Institute of Physics CAS working on the same area but with a different technique.
Together, this technology breakthrough in material research was possible through two short years of collaboration.
(This was Electronicstalk's Top Story on 26 June 2002).
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