Product category:
Memory Devices and Modules
News Release from: MagnaChip Semiconductor | Subject: 0.18um EEPROM process
Edited by the Electronicstalk Editorial
Team on 23 February 2007
EEPROM process boasts compact cell size
MagnaChip Semiconductor has commenced operation of 0.18um EEPROM process technology for smart cards, banking cards, RFID, medical and other applications.
MagnaChip Semiconductor has commenced operation of 0.18um EEPROM process technology for smart cards, banking cards, RFID, medical and other applications The 0.18um EEPROM process technology has been qualified and characterised successfully using 1Mbit macro blocks
This article was originally published on Electronicstalk on 5 Feb 2007 at 8.00am (UK)
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This technology offers minimum 300k cycling as well as a minimum of 10 years of data retention at under 150C.
Further, the EEPROM cell size of 0.95um2 results in a chip size benefit for customers.
The process is compatible with a logic process and has design support with a PDK and MagnaChip's complete library.
Various macro memory blocks can be supplied by a third party IP provider.
A range of low power process options are available, particularly for very low leakage applications such as medical and automotive.
Sang Park, Chairman and CEO of MagnaChip, said: "We remain focused on expanding our technology leadership in support of our customers worldwide".
"We have refined our 0.18um EEPROM process to offer an exceedingly small cell size and a true low cost solution".
"Further, we now plan to merge high voltage processes with 0.18 EEPROM to offer additional customer applications".
"We are also working to strengthen reliability with increased cycling".
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