Software tests product compatability

EDA Simulator Link products support design teams across FPGA and ASIC markets that are striving to reduce development time, design flaws and verification costs.

The MathWorks now offers a continuous verification workflow that connects system-level models and algorithms developed in Matlab and Simulink with digital hardware simulators from the three major EDA companies.

With the EDA Simulator Link DS, which supports co-simulation between Matlab and Simulink and the Synopsys VCS MX functional verification solution, The MathWorks completes its EDA Simulator Link portfolio, which also includes EDA Simulator Link MQ (for Mentor Graphics' ModelSim and Questa) and EDA Simulator Link IN (for Cadence Incisive Simulator).

EDA Simulator Link products from The MathWorks offer support for VHDL, Verilog and mixed-language simulators, enabling engineers to connect Matlab and Simulink to their choice of hardware description language (HDL) and register transfer level (RTL) simulator for their hardware design and verification tasks.

The products also work seamlessly with Simulink HDL Coder from The MathWorks to automate integration of legacy RTL IP with designs developed in Matlab and Simulink.

EDA Simulator Link products support design teams across FPGA and ASIC markets that are striving to reduce development time, design flaws and verification costs.

The success of EDA Simulator Link products in improving product quality and cutting verification time has fuelled demand for additional interfaces to hardware workflows.

As a result, the EDA Simulator Link portfolio has expanded and has encouraged EDA vendors to deliver similar tools for analogue and mixed-signal simulators such as Synopsys Discovery AMS and Saber, Cadence Virtuoso multiMode Simulation, Cadence PSpice and Cadence Allegro AMS Simulator and Mentor Graphics ADVance MS (ADMS).

"Today's semiconductor and electronics companies rely on a range of tools to design and verify their products", said Ken Karnofsky, Director of Signal Processing and Communications at The MathWorks.

"Now, implementation and verification teams can re-use the algorithm and system-level design and verification work done in Matlab and Simulink to reduce downstream design and verification time across projects and hardware implementation tools".

"Such re-use lowers adoption costs by integrating the preferred tools and languages already used throughout the product development process".

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