Product category:
Intellectual Property Cores
News Release from: Nallatech | Subject: Floating-point core library
Edited by the Electronicstalk Editorial
Team on 29 November 2001
FPGA cores aim to beat DSPs at floating
point
Nallatech has launched a fully IEEE754-compliant single-precision floating-point core library which now allows Xilinx's FPGAs to exceed the floating-point performance of the latest DSPs.
Nallatech has launched a fully IEEE754-compliant single-precision floating-point core library which now allows Xilinx's FPGAs to exceed the floating-point performance of the latest DSPs Typical execution time for a 1024-point fast Fourier transform (FFT) is 10us
This article was originally published on Electronicstalk on 26 Apr 2001 at 8.00am (UK)
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Real-time signal processing, transformation and optimisation are among application areas that will benefit from the new cores.
Basic operations include full signed addition/subtraction, multiplication, division, square root plus float to integer and integer to float conversion, all with full exception handling and support for normalised and subnormal numbers.
Special attention has been paid to tailoring individual items to Xilinx's Virtex/Virtex-E product ranges, to give pipeline clock speeds of up to 165MHz, and with up to 20 multipliers on a Virtex 1000E, theoretical computational throughput on Nallatech's Ballyblue DIME module is now a powerful 12GFLOPS.
Nallatech is now optimising the core elements for Virtex-II, so that the reduced core size and on chip-resources will give increased clock speeds and massive parallelism.
According to Dr Malachy Devlin, Chief Technology Officer: "Our Benblue-II with two Virtex-II 6000s gives over 12 million system gates on a single module, and by putting four Benblue-IIs on a single cPCI card, a blistering full IEEE-754 precision of 200GFLOPS is achievable.
Furthermore, with the scalability of DIME-II, users can now put multiple cards within a system to provide increased computational capability and system I/O interfacing".
According to Allan Cantle, CEO: "This is a giant leap for FPGA-centric systems and the integration of our new cores with MATLAB and Xilinx's System Generator will finally allow designers much greater flexibility and reduced time to market for the next generation of communication algorithms".
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