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Product category: Power Supply ICs and Controllers
News Release from: National Semiconductor | Subject: LP2995
Edited by the Electronicstalk Editorial Team on 05 March 2002

Regulator for DDR memories cuts system
cost

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National Semiconductor has a high-performance regulator for double-datarate (DDR) memory termination supply it claims reduces system cost by 60% for PCs, games and information appliances.

National Semiconductor has a high-performance regulator for double-datarate (DDR) memory termination supply it claims reduces system cost by 60% for consumer electronics, PCs, games and information appliances Developed to meet the JEDEC stub series termination logic (SSTL) specifications for DDR bus termination, this small-footprint regulator is capable of sinking and sourcing 1.5A of continuous current and consumes only 250uA quiescent current

Its input configuration is flexible and can be connected to either a 5, 3.3 or 2.5V rail, while handling transients up to +/- 3A.

"We have incorporated National's LP2995 into our reference design and we are pleased with the performance of this solution", said Randy Schnepper, hardware development manager, integrated technology group at Micron Technology.

"Micron has been closely involved with National in the system implementation and evaluation of the LP2995.

Solutions like the LP2995 act as a catalyst in our effort to accelerate the rate of adoption of DDR memory into applications".

Due to higher performance and cost parity with SDRAM memory, DDR SDRAM is being designed into the newest set-top boxes, digital TVs, industrial applications, desktop, notebook and gaming devices.

DDR memory architecture doubles the data transfer rate over standard SDRAM.

Among the first users of this memory were graphics cards for PCs that took full advantage of the memory's speed for high-performance image rendering.

The LP2995's output (VTT) incorporates a push-pull stage and includes a Vsense pin providing for superior load regulation.

National's LP2995 also includes a reference voltage (VREF) that is used as a global feed for chipsets and DDR SDRAM memory modules.

This configuration allows the entire power management system for active termination to be contained in one package occupying the smallest footprint on the market.

"National developed the new LP2995 to serve our customers and memory suppliers like Micron who needed a more elegant solution for terminating DDR memory buses", said Ed Lam, vice president of the power management group at National Semiconductor.

"This solution only requires three external components for active termination compared to 16 for a synchronous switcher approach.

The LP2995 reduces our customers' assembly time, eliminates stocking of unnecessary and expensive components and drops system costs by well over 60%.

This is exactly what our customers need in order to move forward with DDR memory".

The LP2995 will terminate the memory bus with less noise.

National's linear architecture results in the elimination of switching noise and thereby improves data integrity on the SSTL bus.

The new LP2995 is sampling now in both small outline (SO)-8 and leadless leadframe package (LLP)-16 packages and is priced at $0.85 each in 1000 units.

Volume production is scheduled for March 2002.

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