Product category:
Analogue and Mixed Signal ICs
News Release from: National Semiconductor | Subject: ADC12C170, ADC12V170
Edited by the Electronicstalk Editorial
Team on 22 August 2007
ADCs suit WiMAX and 3G wireless
communications
National Semiconductor has introduced two 12bit170Msample/s analogue-to-digital convertors (ADCs) and a 14-bit, 155 Msample/s ADC, each with a full-power bandwidth of 1.1 GHz.
National Semiconductor has introduced two 12bit 170M sample/s analogue-to-digital convertors (ADCs) and a 14bit, 155 Msample/s ADC, each with a full-power bandwidth of 1.1GHz Available in dual data rate, low-voltage differential signaling (LVDS) and CMOS output options, the ADCs are targeted at demanding WiMAX and 3G wireless communications applications
This article was originally published on Electronicstalk on 5 Jan 2001 at 8.00am (UK)
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In high intermediate frequency (IF) sampling receiver applications, the 1.1GHz bandwidth capability of these ADCs provides high spurious free dynamic range (SFDR) and signal-to-noise ratio (SNR) performance that extends well beyond 250MHz input frequencies.
This enables the system designer to digitise the signal at the first IF, thereby eliminating a down conversion stage, which reduces component count and system power.
The 12bit ADC12C170 with parallel CMOS outputs and 12bit ADC12V170 with dual data rate, parallel LVDS outputs offer the industry's highest SFDR above 250MHz input frequencies.
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Compared to competitive devices, the ADC12C170 at 84.1dB offers 5.5dB better SFDR and the ADC12V170 at 83dB offers 3.8dB better SFDR at an input frequency of 250MHz.
At 1.1GHz, the ADC14V155 delivers 57% higher full-power bandwidth than competing 14bit ADCs.
The device also provides an SFDR of 85dB and SNR of 69.5dB at an input frequency of 238MHz.
The ADC14V155, with dual data rate and parallel LVDS outputs is the latest addition to National's high-speed 14bit ADC family, joining the ADC14155, with CMOS outputs, introduced in mid-2006.
These ADCs are well-matched to work with National's high-speed op amps and highly-integrated clock conditioners, such as the single-chip LMK03000, to provide a complete signal-path system solution.
The ADC12C170 and ADC12V170 employ a differential, pipelined architecture and operate in single-ended or differential clock modes.
At an input frequency of 70MHz, the ADC12C170 provides 85.4dB SFDR and 67.2dB SNR, while the ADC12V170 provides 85.8dB SFDR and 67.2dB SNR.
The ADC12C170 operates from a 3.3V supply and typically consumes 715mW, while the ADC12V170 typically consumes 781mW.
Both ADCs include a power-down feature to reduce power consumption to 5mW.
The combination of high SFDR performance and low power makes them well suited for digital pre-distortion techniques to improve power amplifier efficiency in base station applications.
The ADC12C170 and ADC12V170 are supplied in a 48-pin LLP package and are pin-equivalent to the 14bit ADC14155 and ADC14V155, respectively.
The ADC14V155 employs a differential, pipelined architecture and operates in single-ended or differential clock mode.
Its superior dynamic performance and linearity at high IF allows for the consolidation of signal paths, enabling the migration from a single carrier architecture to a multi-carrier approach where a single ADC digitises several carriers.
The device's low-jitter front-end allows the digitisation of high frequency inputs up to 450MHz, providing flexibility in system frequency planning.
The ADC14V155 operates from a 3.3V supply and typically consumes 951 mW.
It offers a power-down feature to reduce power consumption to 15mW, while a separate 1.8V supply for the digital interface allows low-power operation with reduced noise.
The ADC14V155 is supplied in a 48-pin LLP package.
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