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Product category: Microprocessors, Microcontrollers and DSPs
News Release from: Oki Electric | Subject: SoI-CMOS transistors
Edited by the Electronicstalk Editorial Team on 10 October 2005

Novel transistor structure cuts standby
drain

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Oki Electric has developed a new device structure for super low off-leakage current.

Oki Electric has developed a new device structure for super low off-leakage current While maintaining the speed of performance of previous devices, the SoI (silicon on insulator)-CMOS transistor structure succeeds in reducing the standby consumption current (off-leakage current) by over 90% compared with previous transistors

Oki is the first company in the world to develop a fully depleted SoI transistor using a nondoped body and nonoverlap type SoI structure.

"With growth in the use of personal and mobile communication products, demands for lower power consumption LSIs have also been increasing".

"To respond to such needs we have been researching and developing the fully depleted SoI technology, which enables a high performance, low power consumption LSI", said Akira Kamo, President of Silicon Solutions Company at Oki Electric.

"We are excited at this experimental stage achievement".

"Confirming high-speed performance while significantly reducing off-leakage current enables us to accelerate development in sensor network products using coin batteries and solar power going forward".

The newly developed nondoped body and nonoverlap SoI structure features two major improvements.

In previous SoI devices, it was difficult to prevent current leakage because the body potential rises unless the electrical potential of the body were fixed.

By achieving a nondoped structure, Oki has succeeded in reducing the current leakage.

And, with the previous source/drain to gate overlapped structure, parasitic capacitance occurred at overlap regions, which reduced the performance speed.

By achieving a nonoverlap structure, Oki reduced unnecessary parasitic capacitance and improved performance speed.

To achieve a high threshold voltage for super low off-leakage current, it is common to use a process development based on gate electrode material different from conventional polysilicon, such as a metal gate electrode.

However, as the process becomes more complex, the cost becomes higher.

The new structure device uses P+ gate for NMOS, N+ gate for PMOS, the opposite in polarity of normal CMOS gates, thus increasing compatibility with conventional process by using a low-cost polysilicon gate process, while also achieving a low-cost structure.

The nonoverlap type structure transistor has been seen in bulk device used in high-speed, high-performance applications, but the Oki development is the first in the world using SoI for super low off-leakage applications.

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