Low phase jitter from phase locked loop chips

Phase locked loop chips have low phase jitter and are inherently cheaper than standard crystal oscillators

ON Semiconductor's PureEdge family of phase locked loop (PLL) based devices is said to deliver 50% better phase jitter than competitive products.

"Growing our timing business is a key focus for the Standard Products Group", says Dan Huettl, ON Semiconductor General Manager of the Advanced Logic Division.

"We've leveraged our leadership EClinPS design expertise with high-speed, low-jitter differential signaling techniques and now have the industry's best PLL-based low phase noise-clock generation technology".

"With the planned expansion of the PureEdge family, we will continue to gain momentum as a key player in the clock generation market space as a provider of solutions for the entire clock tree".

The first PureEdge devices available are the NB3N3001 and NB3N3011.

Creating LVPECL, sub-picosecond jitter quality clocks at 100, 106.25, and 212.5MHz, these devices are suitable for FibreChannel and Serial ATA (SATA) applications.

The PureEdge architecture provides increased design flexibility and reduced cost compared to standard crystal oscillators.

The devices are 3.3V clock generators with LVPECL differential outputs.

Employing advanced 0.25um CMOS technology, the devices significantly outperform competitive devices with phase noise comparable to expensive Surface Acoustic Wave (SAW) crystal oscillators.

Producing phase jitter of only 0.3ps - compared with competitive devices that perform at 0.7ps - ON Semiconductor's PureEdge devices free up more of the system designer's precious timing budget.

"While the industry struggles with supply uncertainties created by recent supplier consolidation and timing business divestitures, ON Semiconductor has continued to provide customers with competitively priced timing solutions that deliver products of the highest performance and best quality", says Huettl.

"The company's reputation for solid delivery and superior customer service serves to further strengthen the confidence of our customers".

"During the coming year, we plan to introduce additional PureEdge products that target the demanding technological needs and unique industry challenges of the marketplace".

The NB3N3001 uses an inexpensive reference crystal to generate a differential LVPECL output clock at 106.25 or 212.5MHz.

It provides a typical root mean square (RMS) phase jitter of less than 0.3ps and noise floor of -135dB relative to the carrier per hertz (dBc/Hz) at 100kHz offset from the carrier frequency.

The NB3N3011 uses an inexpensive reference crystal to generate a differential LVPECL clock signal of 100 or 106.25MHz.

It provides a typical RMS phase jitter of less than 0.3ps and noise floor of -135dBc/Hz at 100 kHz offset from the carrier frequency.

Silicon-based ICs, such as the NB3N3001 and NB3N3011, are inherently much simpler to manufacture than expensive crystal oscillators.

This results in lower overall system costs and vastly lower lead times.

Both devices are pin-compatible drop-in replacements for competitive function devices ICS843001 and ICS843011 - and provide customers with an improved performance and cost alternative.

Typical 0.3ps RMS phase jitter measurements provide 50% reduction over competitive devices over the integration range of 637 KHz to 10MHz.

Phase Noise less than -135 dBc/Hz at 100kHz offset delivers 5 dBc/Hz better phase noise performance than competitive devices.

Packaged in a lead free (lead-free) TSSOP-8 package, the NB3N3001 and NB3N3011 are budgetary priced at US $1.50 per unit in 2,500 unit quantities.

Back to top