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News Release from: ON Semiconductor | Subject: M-XPA-II family
Edited by the Electronicstalk Editorial
Team on 20 March 2008
Structured ASICs qualify for military
duties
Technology provides military and aerospace manufacturers with a cost-effective route to creating leading-edge ASICs and FPGA-to-ASIC conversions with minimum time to market.
XPressArray-II (XPA-II) structured ASIC technology, formerly offered by AMI Semiconductor, is now available for military specification operating temperatures (as the M-XPA-II family) By providing operation across the full military operating temperature range of -55 to +125C, XPA-II provides military and aerospace manufacturers with a cost-effective route to creating leading-edge ASICs and FPGA-to-ASIC conversions with minimum time to market
This article was originally published on Electronicstalk on 31 Mar 2003 at 8.00am (UK)
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On-shore production and full ITAR compliance is assured through all stages of the development process, from initial design through to back-end packaging and test.
XPA-II is targeted at medium-density, high-speed 1.5V ASIC applications and FPGA-to-ASIC conversions.
The structured ASIC family offers a true drop-in alternative for a variety of FPGAs, including Altera APEX-II and Stratix technologies and Xilinx Virtex-II solutions.
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Based on a hybrid fabrication process, XPA-II combines advanced 0.15um TSMC process technology with programmable metal using ON Semiconductor's own state-of-the-art manufacturing facilities.
The result is an innovative next-generation technology platform that dramatically reduces development time for SoC applications while delivering significant NRE (nonrecurring engineering costs) and unit cost savings.
Operating with system clock speeds up to 210MHz for 18x18 soft multipliers and local clocks up to 500MHz, XPA-II 0.15um devices deliver high performance, low power ASIC solutions with densities to 4.8 million ASIC gates.
Configurable memory ranges from 258Kbit to 4.8Mbit, increasing to 6.1Mbit with the addition of distributed configurable memory.
The XPA-II I/O technology includes fully configurable signal, core and I/O power supply pad locations and support for a wide range of I/O standards, including PCI, PCI-X, Mode 1 and Mode 2, GTL, HSTL, SSTL and LVPECL.
The I/O technology also features a double datarate (DDR) memory interface and 1Gbit/s low-voltage differential signalling (LVDS).
All these features are available in a platform that supports power dissipation of just 55nW/MHz/gate, reducing total chip power consumption to less than 20% of a standard FPGA.
High fault coverage is provided through integrated scan-test, memory BIST and JTAG support.
"XPressArray-II has become an established technology for allowing electronic equipment manufacturers to achieve better cost, performance and power specifications than FPGAs and quicker time to market than cell-based solutions", states Dave Locke, ON Semiconductor Mil/Aero Product Manager.
"Compatibility with the military operating temperature range extends these benefits to military and aerospace manufacturers and eliminates the risk and the cost associated with upscreening alternative solutions".
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