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News Release from: Panasonic Industrial Europe
Edited by the Electronicstalk Editorial
Team on 04 August 2006
Tests begin on 45nm system on chip
process
Matsushita Electric Industrial and Renesas Technology collaborate to produce high-speed electronics process?
Matsushita Electric Industrial and Renesas Technology have entered the full integration testing of a 45nm SoC (system-on-chip) semiconductor manufacturing technology The process technology is one of the first in the industry to begin a full integration incorporating ArF (argon-fluoride) immersion scanners with a numerical aperture (NA) of 1.0 or more
This article was originally published on Electronicstalk on 16 Mar 2001 at 8.00am (UK)
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The two companies started working on the joint 45nm process development project in October 2005 and have collaborated on previous generation process development since 1998.
The current joint development project is scheduled to be completed in the middle of 2007, with volume production targeted to begin in fiscal 2008.
The new 45nm process will be used by both Matsushita and Renesas in manufacturing SoCs for advanced mobile products and networked consumer electronics products.
Besides the advanced ArF immersion lithography, the companies plan to introduce other new technologies as part of the development project, including introduced-strain high-mobility transistors and ELK (K = 2.4) multilayer wiring modules.
The new project is part of the fifth stage of their collaboration, which began in October 2005.
Previous joint-development projects includes a 130nm DRAM merged process in 2001, a 90nm SoC process in 2002, a 90nm DRAM merged process in 2004, and a 65nm SoC process in 2005.
Matsushita and Renesas will continue to work together to develop 45nm SoC process technologies efficiently.
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