Core brings order to complex FPGA designs

IP core eases complex device design by providing standards-based CORBA protocol messaging for FPGA logic blocks.

PrismTech has come up with a novel way to reduce the complexity of programming and integrating FPGAs in embedded systems.

PrismTech's Integrated Circuit ORB (ICO) is an IP core that provides standards-based CORBA protocol messaging for FPGA logic blocks.

The patent application for this breakthrough technology has recently been published by the United States Patent and Trademark Office (Pub No: US 2007/0130570 A1).

"The highly optimised General Inter-ORB Protocol (GIOP) mechanism we have developed for FPGAs provides developers with an elegant solution to the inherent latency and overhead challenges of sending and receiving CORBA messages within a heterogeneous embedded computing environment", says Steve Jennis, Senior Vice President of Corporate Development, PrismTech.

"At PrismTech we develop new technologies that solve complex integration challenges".

"The filing of this patent further demonstrates our position as a leading innovator".

"ICO brings embedded middleware to FPGAs just as we've offered embedded middleware for GPPs and DSPs for several years".

ICO provides standards-based CORBA communications to application components implemented in hardware devices such as FPGAs, ASICs and CPLDs without the use of resource-sapping proxies, a soft-core GPP or any other hardware abstraction layer necessary to facilitate integration.

Thus ICO delivers an enormous gain in the performance and efficiency of data exchange within a multiprocessor embedded system as well as a much easier development interface.

Key elements of PrismTech's ICO include the GIOP processor - a VHDL/System-C/Verilog description of a GIOP protocol processor.

The ICO is responsible for implementing the transfer syntax used in CORBA messages.

The engine marshals and unmarshals GIOP messages and extracts header and data fields.

Message data are transferred to and from the embedded application logic.

The open standard interface can interface ICO with a variety of transport technologies.

The IDL-VHDL Compiler generates stubs and skeletons in VHDL from CORBA IDL, such that ICO can send and receive requests between clients and servants implemented in the software and hardware elements of radio modules.

And a VHDL component wrapper implements the software communication architecture (SCA) resource for embedded application logic to provide compatibility with software defined radio (SDR) requirements.

This technology is available as a COTS product from PrismTech as part of both the OpenFusion embedded middleware and Spectra SDR product families.

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