Mixed signal process adds antifuse programmability

PolarFab now offers a one-time programmable antifuse for PBC4, its 0.5um BCD process.

PolarFab now offers a one-time programmable (OTP) antifuse for PBC4, its 0.5um BCD (bipolar-CMOS-DMOS) process.

The new antifuse is a nonvolatile memory element that requires no additional mask layers, allowing for a cost-effective post-package or wafer-level trim capability.

The antifuse hard macro is organised in an 8bit (1byte) block, where each individual bit may be selected for programming.

In addition, multiple antifuse blocks can be implemented in a single design yielding a greater number of trim bits per die and enabling trim coverage over a wider range or to a greater resolution.

The patent-pending antifuse consists of a high-resistance, reverse biased junction before programming.

Programming the antifuse, which requires a 9V supply, creates a relatively low resistance short across the junction and a logic level output of the antifuse.

The antifuse also includes look-ahead capability, so designers can test the effect of a programmed bit before permanently programming it.

PolarFab's PBC4 process, available on 6 and 8in wafers, is ideal for power management applications including motor controllers, gate drivers, and microprocessor supervisory circuits.

The process includes: complementary N- and P-channel MOSFETs with 5, 7, 16 and 30V capabilities as well as a 40V capability for NMOS only; dual gate oxides (5.5 and 16 V); a 16V poly-poly capacitor; a ZTC poly resistor; two high-value diffused resistors; a Schottky diode; a lateral PNP; and two vertical NPN transistors.

Two- and three-layer metal versions of the process are also available.

The PBC4 process is supported with a complete set of design tools, including a process design kit (PDK), models, and a comprehensive design and layout manual, as well as PolarShuttle, PolarFab's multiproject, fast track programme, to manufacture prototypes.

Pricing and delivery depend on customer requirements.

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