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Product category: Microprocessors, Microcontrollers and DSPs
News Release from: PMC-Sierra | Subject: RM7000C and RM7065C
Edited by the Electronicstalk Editorial Team on 14 March 2002

64bit processors up the ante to 600MHz

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PMC-Sierra today introduced the fourth generation of its RM7000 product family, the RM7000C and RM7065C 64bit MIPS-based processors with maximum production clock speeds of 600MHz.

PMC-Sierra today introduced the fourth generation of its RM7000 product family, the RM7000C and RM7065C 64bit MIPS-based processors with maximum production clock speeds of 600MHz The RM7000C and RM7065C carry on PMC-Sierra's legacy of pin- and software-compatible solutions, delivering significant performance upgrades to equipment designers

The new processors use an industry leading 0.13-micron copper-interconnect technology process, which enable power consumption to drop to 2.5W at 600MHz.

PMC-Sierra's 64bit MIPS-based processors span a broad range of communications applications from network router control planes and enterprise switches to networked printers and networked set-top boxes.

"PMC-Sierra offers the broadest range of high performance MIPS-based CPUs in the world", said Tom Riordan, vice president and general manager of PMC-Sierra's MIPS processor division.

"Our new RM7000C and RM7065C processors build upon the extensive commercial success of the RM7000 product family to provide scalable, cost-effective solutions with the best speed-power options available".

The RM7000C delivers a maximum production clock rate of 600MHz and is also available at a rate of 533MHz.

It provides a pin-compatible speed upgrade for the RM7000B, RM7000A, RM7000 and RM5271.

The RM7000C features an external cache controller for up to 64Mbyte of L3 cache.

By providing direct access to a very large SRAM memory cache, application performance increases.

The EZ cache mode operation reduces system cost and complexity by enabling the RM7000C to quickly access the off-chip L3 cache without the need for Tag RAMs.

For applications where the L3 cache controller functionality is not required, PMC-Sierra offers the RM7065C in a smaller and more cost-effective package.

The RM7000C and RM7065C are PMC-Sierra's first MIPS-based processors to use the latest 0.13-micron low-voltage process, which lowers power consumption to 2.5W at the maximum clock rate of 600MHz, while increasing performance and reducing die size.

Similar to all RM7000 family products, the RM7000C and RM7065C are equipped with 256Kbyte of integrated Level 2 cache, as well as 16Kbyte each for the independent Level 1 instruction and data caches.

An enhanced system interface on the RM7000C and RM7065C provides compatibility with legacy system controllers (LVTTL levels: 2.5 or 3.3V) to increase speeds up to 133MHz, as well as next generation controllers (HSTL level: 1.5V) for speeds up to 200MHz.

RM7000 A wide range of development tools and resources are available through third-party development partners.

Board support packages, based on leading operating systems including VxWorksTM and Linux, are available.

Samples of the RM7000C and RM7065C will be available in Q2 2002, housed in 304 and 256 TBGA packages, respectively.

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