Product category:
Microprocessors, Microcontrollers and DSPs
News Release from: PMC-Sierra | Subject: RM9000x1
Edited by the Electronicstalk Editorial
Team on 30 October 2002
Speedy MPU integrates memory and I/O
interfaces
PMC-Sierra has expanded its RM9000 family of highly integrated MIPS-based processors with the 1GHz single-core RM9000x1.
PMC-Sierra has expanded its RM9000 family of highly integrated MIPS-based processors with the 1GHz single-core RM9000x1 The RM9000x1 integrates memory and high-speed I/O interfaces on-chip to optimise performance, and uses a 0.13 micron low voltage process to reduce total device power consumption to an industry low of less than 5W
This article was originally published on Electronicstalk on 24 Jan 2008 at 8.00am (UK)
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The RM9000x1 is ideal for use in core and edge routers, DSLAMs, multiservice switches, high-end laser printers, storage area network applications and wireless basestations.
"The highly-integrated 1GHz RM9000x1 provides customers with a low power, low cost solution for high-performance applications not requiring a dual-CPU processor", said Tom Riordan, Vice President and General Manager of the MIPS Processor Division of PMC-Sierra.
"The RM9000x1 and the RM9000x2 are pin-compatible and provide system designers with an interchangeable solution based on the customer's performance requirements with minimum investment in software redevelopment.
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The RM9000 family of processors follows in the footsteps of the highly successful PMC-Sierra RM7000 and RM5200 high performance processor families.
The RM9000x1's 64bit MIPS-based CPU core is compatible with the MIPS-64 instruction set architecture.
The CPU is optimised for performance by using a seven-stage dual-issue pipeline combined with tightly coupled L1 and L2 caches and sophisticated branch prediction for maintaining pipeline efficiency.
To reduce memory latency for packet header processing, the RM9000x1 provides the direct deposit cache feature allowing the direct memory access (DMA) of packet headers into L2 cache from the HyperTransport or SysAD buses while the payload is written into main memory.
The integrated high-speed bus interfaces provide low latency accesses to main memory and high bandwidth for I/O.
A 200MHz integrated DDR SDRAM interface provides 25.6Gbit/s of memory bandwidth.
The 500MHz DDR HyperTransport and 200MHz 64bit SysAD I/O interfaces provide high-bandwidth connections to a wide range of networking peripherals.
For example, the HyperTransport link enables the RM9000x1 to connect other processors and coprocessors such as security processors or classifiers, as well as to high-speed HyperTransport switches and bridges, backplanes, and FPGAs.
The local bus provides connectivity to lower speed devices such as boot ROM and Flash.
To guarantee that data movement does not slow packet processing, the RM9000x1 has an embedded switch fabric.
This buffered fabric, the packet switch, connects the CPU, memory and I/O interfaces.
The packet switch has five ports supporting an aggregate bandwidth of 160Gbit/s.
The high-bandwidth packet switch improves overall performance by allowing simultaneous data transfers on all five of its ports.
The packet switch, for example, will allow a CPU access over SysAD at the same time that a HyperTransport peripheral is accessing the main memory.
The MIPS architecture has become one of the most widely licensed, open-industry standard architectures in networking, networked printer and networked consumer applications.
A wide range of development tools and resources are available through a large number of third-party development partners.
The RM9000 family of processors will support multiple operating systems such as Linux and Wind River's VxWorks.
A variety of packaged systems for software development or for full product deployment are currently available through Momentum Computer.
These packaged systems provide operating systems, compilers, debuggers, RTOS and peripheral support for HyperTransport.
The on-chip EJTAG debug module ensures smooth and easy debugging of both hardware and software by allowing a single step and state examination.
The RM9000x1 is priced at $210 in volume production.
PMC-Sierra will begin sampling the RM9000x1 in Q4 of 2002.
Evaluation boards will also be available in Q4 of 2002.
(This was Electronicstalk's Top Story on 29 October 2002).
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