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Product category: VMEbus Boards and Assemblies
News Release from: Pentek | Subject: Model 6821
Edited by the Electronicstalk Editorial Team on 21 January 2004

Speedy sampling for VMEbus DSP board

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A new single-channel 6U VMEbus board features one of the fastest 12bit A/D convertors in the market with sampling rates to 210MHz.

A new single-channel, 6U VMEbus board features one of the fastest 12bit A/D convertors in the market with sampling rates to 210MHz Targeting extremely high-performance DSP tasks, the Pentek Model 6821 couples this high-speed ADC to two new Virtex-II Pro FPGAs by Xilinx

The board excels in acquisition, demodulation, convolution, filtering, processing, and analysing operations critical for many real-time, high-frequency applications.

The Model 6821 accepts one front-panel analogue input and delivers digital output samples over two or four front panel data port (FPDP or FPDP II) connectors.

A front panel low-voltage differential signalling (LVDS) bus supports synchronous, triggered data acquisition across multiple boards.

This capability is essential for multichannel applications such as radar and direction finding.

Rodger Hosking, Vice President of Pentek explains: "With the new Analog Devices AD9430 A/D connected directly into both Virtex-II Pro FPGAs on a single board, Model 6821 customers can now digitise a 100MHz bandwidth signal and process it in real time".

He adds: "Our new 6821 can be used as a stand-alone system or as a powerful front-end preprocessor for Motorola G4 PowerPC and Texas Instruments C6000 DSP boards.

Four FPDP ports deliver tremendous throughput to a wide range of third-party products, while two 128Mbyte local memories handle real-time buffering for tracking, transient capture and recording applications".

The Virtex-II Pro FPGAs represent the latest FPGA offering from Xilinx.

The 6821 features two XC2VP20 or XC2VP50 devices, each with up to 6 million system gates and as many as 232 hardware multipliers.

These multipliers along with generous on-chip configurable RAM make these FPGAs ideal for handing real-time DSP algorithms at the 210MHz A/D sampling rate.

The two FPGAs are optionally equipped with 128Mbyte of SDRAM for data delay and buffering capacities, critical for many real time applications where a digital delay is essential such as radar and signal intelligence.

Two 16Mbyte Flash memories support boot operations for optional use of the embedded FPGA microcontrollers.

The A/D convertor sample clock can be sourced from an internal crystal oscillator or from an externally supplied sinusoidal clock at a maximum frequency of 210 MHz.

This clock is accepted through a front panel SMA connector terminated in 50ohm.

Four FPDP output ports, two for each FPGA, support data transfer rates of 320Mbyte/s each.

One port per FPGA is located on the 6821 front panel, and the second is available on an optional second-slot panel.

Additional LVDS data I/O is available through either the VMEbus P2 connector or the optional second-slot front panel.

Pentek's GateFlow FPGA resources include the GateFlow FPGA design kit supporting user-defined FPGA algorithms; the GateFlow IP core library for high-performance FFTs (fast Fourier transform), digital receivers and radar pulse compression algorithms; and GateFlow factory installed IP cores so customers can take immediate advantage of FPGA technology with zero FPGA development effort.

One GateFlow offering, the wideband digital receiver IP core 422, offers a complete FPGA-based digital-down-convertor function for the Model 6821 with user programmable filter coefficients, tuning frequency and decimation.

Pricing for the Model 6821 A/D VME board with Virtex-II Pro FPGAs starts at US $7595 and is immediately available with 12 weeks ARO.

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