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Product category: CompactPCI Boards and Assemblies
News Release from: Pentek | Subject: Model 7231 and 7331
Edited by the Electronicstalk Editorial Team on 26 May 2004

Multiband receivers made for CompactPCI
systems

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Pentek has made its first foray into the cPCI market with 16- and 32-channel multiband-receiver boards featuring 14bit A/D convertors and Virtex-II FPGAs for signal processing.

Pentek has made its first foray into the cPCI market with a 3U 16-channel multiband-receiver board and a 6U 32-channel multiband-receiver board featuring 14bit A/D convertors and Virtex-II FPGAs for signal processing Both boards consist of one or two Model 7131 digital receiver PMC modules and a PMC-to-cPCI adapter assembled and tested as a single cPCI board

Both COTS (commercial-off-the-shelf) cPCI boards were designed to maximise configuration flexibility, switching and optimised synchronisation for software radio applications such as synchronous datacommunications, wireless basestations, direction finding, satellite communications, wireless LAN, high-frequency sonar and telecommunications.

Rodger Hosking, Vice President of Pentek, commented: "Drawing on nearly 12 years of expertise and success with software radio technology, these multiband receivers represent Pentek's first offerings for CompactPCI systems".

"For years, system designers have used our leading technology solutions to meet demanding application requirements in software radio, signal processing and data acquisition".

"Our proven track record in handling multichannel synchronisation, flexible FPGA design strategies and a system-level approach to challenging applications, now delivers a valuable new resource to CompactPCI system engineers".

The Model 7231 accepts four analogue RF inputs at +4dBm full scale into 50ohm on front-panel SMA connectors, whereas the Model 7331 offers two analogue inputs.

Each input is transformer coupled and digitised by an AD6645 14bit A/D convertor with options for maximum sampling rates of either 80 or 105MHz.

The sampling clock can be driven from an internal 80 or 100MHz crystal oscillator, from an external 50ohm clock source supplied to a front-panel SMA connector or from the front panel LVDS clock/sync bus.

A/D convertor data are delivered to eight Graychip GC4016 quad multiband digital-receiver chips on the Model 7231 or four quad receiver chips on the 7331.

The maximum input sampling rate for the GC4016 is 100MHz.

Each GC4016 includes four receiver channels capable of independent centre frequency tuning from DC to half the sample clock frequency.

Additionally, A/D data can be delivered directly to the FPGAs, bypassing the digital receivers for wideband applications.

The front-panel LVDS clock/sync bus allows one board to act as a master, driving the sample clock, sync, gating and trigger signals through the LVDS clock/sync bus.

This supports synchronisation of local oscillator phase, frequency switching, decimating filter phase and data collection across multiple boards.

When used with Pentek's Model 9190 clock and sync generator, the boards can support up to 1280 channels, each sharing a common clock and synchronisation signals, for very large multichannel systems including beam-forming applications.

The 7231 and 7331 are both equipped with Xilinx Virtex-II FPGAs.

Data from the A/D convertors and from the GC4016 digital receivers are delivered into the FPGAs, which perform a wide range of user-selectable data packing and formatting functions.

Dual-port memories inside the FPGAs provide efficient PCIbus transfers by buffering receiver and A/D data.

In addition to these standard, factory-defined functions, Pentek makes the wealth of unused resources in these FPGAs easily available to users to add their own custom signal-processing functions.

By choosing either the Xilinx Virtex-II XC2V1000 (standard) or optional XC2V3000 FPGAs, users can implement extremely complex DSP algorithms and take advantage of flexible custom I/O through the cPCI P3 and P5 connectors.

Industry standard 64bit 66MHz PLX9656 PCI interface chips ensure full conformance to all PCIbus timing specifications.

A PCI bridge connects the two PCI interfaces to the cPCI backplane.

Pentek's three-fold GateFlow FPGA resources include the GateFlow FPGA Design Kit supporting user-developed FPGA code, GateFlow IP Core Libraries for high-performance FFTs (fast Fourier transforms), digital receivers and radar pulse compression algorithms and the GateFlow Factory Installed IP Cores that allow customers to take immediate advantage of FPGA technology with zero FPGA development effort.

Third-party and Pentek software development tools are available Windows and Linux platforms.

Both the Model 7231 and 7331 multiband receivers are immediately available at 8-10 weeks ARO.

The Model 7231 16-channel multiband receiver starts at US $6795, and the 32-channel version starts at $12,795.

The Model 7331 16-channel multiband receiver starts at $6695.

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