ADCs and FPGA enhance multiband transceiver

Pentek has significantly boosted analogue performance in the Model 7141 so that the signal-to-noise ratio and the spurious free dynamic range are improved.

The Model 7141 dual multiband transceiver with FPGA is an enhanced successor to Pentek's popular Model 7140 transceiver, which is widely deployed by many customers for Sigint, software radio and communications applications.

Pentek has significantly boosted analogue performance in the Model 7141 so that the signal-to-noise ratio and the spurious free dynamic range are improved by 10dB when compared with many competing products.

"Because our customers typically use signals covering a wide dynamic range, better signal quality means that small signals previously lost in noise can now be detected".

"This is increasingly important for signal intelligence applications, in particular", says Rodger Hosking, Vice President.

"We accomplished our mission for gaining superior analogue performance by using proprietary design techniques in the analogue front end which was tailored to bring out the best characteristics of the Linear Technology 14bit A/D convertors".

Hosking went on to explain that even though A/D convertor device manufacturers cite attractive specifications, the challenge in realising these specifications depends primarily on the printed circuit board layout, component shielding and power supply filtering.

The Model 7141 actually went through several successive board layouts until Pentek design engineers were satisfied that they had achieved the desired A/D performance - improved signal-to-noise ratio and spurious-free dynamic range.

"Sampling signals in the analogue world requires an intimate knowledge of the A/D front end and careful board layout to maximise the full capabilities of the analogue to digital convertor", says Alison Steer, Product Marketing Manager for Linear Technology's High Speed Data Convertor product line.

"Pentek's performance specifications prove they have harnessed the full potential of our high performance LTC2255 A/D to provide the superior combination of speed, quality and optimisation".

"Linear Technology is committed to providing high-performance data convertor products for the software defined radio and similar data acquisition applications".

The Model 7141 accepts two full scale analogue HF or IF inputs on front-panel MMCX connectors at +10dBm into 50ohm with transformer coupling into Linear Technology's LTC2255 14bit 125MHz A/D convertors.

A/D output samples are delivered into the Virtex-II Pro FPGA for signal processing or for routing to other module resources.

A TI/Graychip GC4016 quad digital downconvertor accepts either four 14bit inputs or three 16bit digital inputs from the FPGA, which determines the source of GC4016 input data.

These sources include the A/D convertors, FPGA signal processing engines, SDRAM delay memory and data sources on the PCI bus.

Each GC4016 channel may be set for independent tuning frequency and bandwidth.

For an A/D sample clock frequency of 100MHz, the output bandwidth for each channel ranges from 5kHz up to 2.5MHz.

By combining two or four channels, output bandwidth of up to 5 or 10MHz can be achieved.

A TI DAC5686 digital upconvertor (DUC) and dual D/A accepts baseband real or complex data streams from the FPGA with signal bandwidths up to 40MHz.

When operating as an upconvertor, it interpolates and translates real or complex baseband input signals to any IF centre frequency between DC and 160MHz.

It delivers real or quadrature (I+Q) analogue outputs through two 320MHz, 16bit D/A convertors to two front-panel MMCX connectors at +4dBm into 50ohm.

If translation is disabled, the DAC5686 acts as a two channel interpolating 16bit D/A with output sampling rates up to 500MHz.

The optional factory-installed interpolation filter core 450 increases the sampling rate of real or complex baseband signals by a factor of 16 to 2048, programmable in steps of 4, and relieves the host processor from performing upsampling tasks.

The interpolation filter can be used in series with the DUC's built-in interpolation, creating an overall interpolation range for the module from x2 to x32,768.

The Xilinx XC2VP50 Virtex-II Pro FPGA serves as a control and status engine with data and programming interfaces to each of the onboard resources including the A/D convertors, GC4016 digital downconvertor, digital upconvertor and D/A convertors.

Factory installed FPGA functions include data multiplexing, channel selection, data packing, gating, triggering and SDRAM memory control.

The FPGA includes two PowerPC cores that can be used as local microcontrollers to create complete application engines.

Two independent internal timing buses can provide either a single clock or two different clock rates for the input and output signals.

Each Model 7141 can act as either a timing bus slave receiving timing signals or as a master driving up to seven boards supporting synchronous sampling and sync functions across all connected boards.

Up to 80 boards may be synchronised with a Model 9190 clock and sync generator.

The Model 7141's optional XMC connection complies with the VITA 42 XMC specification and supports high-speed switched-fabric interconnects such as Serial RapidIO and PCI Express.

Dual 4X links between the XMC module and the carrier board handle serialbit rates up to 3.125GHz.

These links operate independently of the PCI interface and achieve streaming data transfer rates of up to 2.5Gbyte/s.

The Model 7141 is fully supported by Pentek's ReadyFlow board support packages (BSPs).

Pentek's ReadyFlow BSPs simplify board operation and setup with easy-to-use function calls.

ReadyFlow libraries offer flexibility and provide low-level access to all of the board's hardware.

Pentek ReadyFlow BSPs and software development tools, plus third-party offerings are all available for a variety of operating systems including Windows 2000/XP, Linux and VxWorks platforms.

The Model 7141 benefits from Pentek's numerous GateFlow FPGA resources.

The GateFlow FPGA Design Kit provides designers with all VHSIC Hardware Description Language (VHDL) source code and device configuration for the basic factory-installed functions to facilitate the addition of custom algorithms.

The developer may add proprietary IP to the core that is shipped with Model 7141 to extend functionality of the board.

Also available are Pentek's GateFlow installed IP cores, including wideband and multichannel digital receivers.

The PMC/XMC commercial version of the Model 7141 dual multiband transceiver with FPGA is priced at US $10,995, with delivery 8 to10 weeks ARO.

The Model 7141 is also available in PCI or 3U and 6U cPCI form factors and ruggedised versions.

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