Clock buffers cut out LVPECL jitter

Pericom Semiconductor has a new family of 3.3V, 1:4 LVPECL clock buffers with speeds up to 800MHz.

Pericom Semiconductor has a new family of 3.3V, 1:4 LVPECL clock buffers with speeds up to 800MHz.

The PI6C4853x ICs target the networking/telecommunications, storage and industrial system markets.

Because of the variety of high-speed applications using LVPECL clock signals and other differential signals, most engineers need to design around mixed-signal architectures.

High-speed LVPECL system environments are also very sensitive to jitter.

The PI6C48533-01 (differential to LVPECL), PI6C48535-01 (LVCMOS to LVPECL) and PI6C48535-11 (crystal to LVPECL) are ideal solutions for solving translation requirements as well as eliminating jitter concerns.

Pericom's PI6C4853x-xx products are 3.3V high-performance differential clock convertors with four pairs of LVPECL outputs.

Each device has different input signals to convert and fan out to four LVPECL outputs.

In addition, each device offers a selection of two inputs for systems with fail safe and redundancy requirements.

Some systems distribute a clock signal from board to board, so if the main system clock fails, the local (backup) clock will be switched over to continue the operation.

All three devices are designed without PLLs in order to eliminate any possibility of injecting noise or jitter during conversion.

A D-latch is also implemented to prevent any runt pulses when switching asynchronous clocks.

Samples are available today with full production in November.

Free product samples, datasheets, Ibis models, technical support and application notes can be found on the company website.

Pricing is $3 in 5000-unit quantities.

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