Clock buffers address next-generation PCIe

PCIe clock buffers support Intel Xeon dual core processor workstation and server applications with as few as four or as many as 19 separate PCIe outputs provided by a single IC.

Pericom Semiconductor Corp has entered production with its high-performance zero-delay PCIe Gen2 clock buffer family.

This family provides reference clocks for serial connectivity at 5.0Gbit/s and meets the reference clock requirements of fully buffered DIMM (FBDIMM) memory modules for workstation and server applications.

These new PCIe Gen2 clock buffers are designed to support Intel Xeon dual core processor workstation and server applications with as few as four or as many as 19 separate PCIe outputs provided by a single IC.

Additionally, stringent PCIe Gen2 (5.0Gbit/s) reference clock jitter requirements are surpassed.

This has been validated by independent testing at a Tier 1 CPU chipset vendor laboratory.

Testing concluded that the PI6C20800S outperformed competitive products in the critical "additive jitter" test, providing less than 1.0ps of additive RMS jitter.

This key benefit enables server platform designers to meet their new Gen2 platform jitter budgets with margin for production manufacturing.

"The server market is projected to grow to over 9 million units in 2010 according to IDC, Worldwide Server Forecast (March 2007)", says Kay Annamalai, Pericom's Senior Marketing Director for Timing Products.

"Pericom is at the forefront of meeting the growing demand of platform designers for higher-performance solutions by delivering fully qualified and available product today".

"The Gen2 (5.0Gbit/s) design cycles for server and workstation platforms are already in progress in our customer base".

"PCI Express Gen1 usage is well established within the workstation and server community, with the Gen2 adoption rate ramping up as chipset providers roll out next generation products".

Combining these Gen2 clock buffers with a server-motherboard clock-generator IC (such as Pericom's PI6C410BS) and a high-stability crystal reference (such as Pericom's SaRonix 49SLMB) results in a complete PCIe timing-tree solution for Intel Xeon Dual Core server applications.

Pericom offers a complete line of timing products to support SAS, SATA, 1.0 and 10.0Gbit/s Ethernet protocols typically used within server platforms.

These clock buffers also address other PCIe Gen2 networking and telecomms applications, as well as servers and workstations.

The PI6C20400S has four differential outputs, and the PI6C20800S has eight differential outputs, each with a spread-spectrum-compatible phase locked loop (PLL).

The PI6C21900 (18+1) and PI6C21900S (17+2) each offer 19 total differential outputs, using two spread-spectrum-compatible PLLs, providing the designer with two separate frequency domains for FBDIMM and PCIe applications.

The PCIe Gen2 (5.0Gbit/s) clock buffer family joins the existing PCIe Gen2 signal switch and clock oscillator product offerings in Pericom's PCI Express solution portfolio.

This makes Pericom's PCI Express product offering the broadest in the industry, with Gen1 (2.5Gbit/s) PCIe packet switches, signal switches, signal conditioners, bridges, physical layer, clock oscillators and clock buffers.

The entire Gen2 5Gbit/s clock buffer family is available now in production quantities.

Pricing in 5000-unit quantities is US $1.35 for the PI6C20400S, $1.50 for the PI6C20800S, and $4.50 for the PI6C21900 and PI6C21900S.

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