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Product category: Design and Development Hardware
News Release from: ProDesign | Subject: Chipit Platinum V4
Edited by the Electronicstalk Editorial Team on 24 January 2006

SoC verification platform turns to
system design

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The new member of the Chipit Platinum series features an enhanced system architecture based on Xilinx Virtex-4 FPGA technology, new debugging features and new software for system design.

ProDesign, a leading supplier of high-speed ASIC and SoC verification platforms, today announced the launch of Chipit Platinum V4 The new member of the company's Chipit Platinum series features an enhanced system architecture based on the latest Xilinx Virtex-4 FPGA technology, new debugging features and new software for system design implementation

Chipit Platinum V4 is the first ASIC prototyping system on the market that can handle up to 21 Xilinx Virtex-4 FPGAs with a flexible programmable connection topology for a large number of different configurations.

This scalable system can be chosen as version with 3, 6, 9, 12, 15, 18 or 21 Xilinx Virtex-4 FPGAs (XC4VLX100/160/200) and can handle designs from 2.3-20 million ASIC gates.

This scalability enables users for example to start with a system configuration of six FPGAs and later upgrade easily to a configuration with 9, 12, 15, 18 or 21 FPGAs.

A patented 3D switching technology allows for architectural tradeoff optimisations with different design structures of the SoC design to achieve highest performance up to 200MHz.

As soon as more than two FPGAs are necessary for verification, the system's connection topology can be changed in software at any time - which is a vital requirement with regard to the re-usability of the system for other projects.

Other major enhancements of Chipit Platinum V4 are new debugging features including host-controlled debugging and separate debugging interfaces as well as an enhanced debugging and system handling software package.

Chipit Platinum V4 gives ASIC and SoC design and verification engineers unprecedented speed and flexibility to validate algorithm performance and to verify and debug their ASIC designs.

This very cost-effective and flexible solution for all stages of hardware-assisted verification - in the initial phases of algorithm creation, during the basic IP development and debugging, or when early prototyping for software development and verification is necessary - shortens the time to market by eliminating costly respins and by providing an early prototype for the software development.

"We are excited to introduce the second generation of the Chipit Platinum series with Chipit Platinum V4, hereby once again setting a new standard for high-speed ASIC verification", said Gunnar Scholl, ProDesign's Director of Marketing and Business Development.

"Due to the increasing complexity of today's ASIC designs, our customers constantly demand more capacity, a higher performance and best debugging capabilities".

"With Chipit Platinum V4 was developed with the input and help of our key customers, resulting in a very cost effective ASIC verification system solution that fulfills highest requirements concerning capacity, speed, flexibility and debugging capabilities".

"We are proud to say that we already shipped the first 15 Chipit Platinum V4 systems to key customers".

"This number emphasises the acceptance of our new high-speed rapid prototyping system, and shows us that we are on the right way".

Like the previous version, Chipit Platinum V4 is a stand-alone system that communicates with the host via ProDesign's proprietary 528Mbit UMRBus communication system technology, allowing for multiple independent communication channels between host and design to be set up for interaction with the ASIC design.

Users can choose between a C/C++ and a Tcl/Tk programming interface and have the option to store and load the configuration data with an integrated CF card interface.

Chipit Platinum V4 comes with a comprehensive software package including Chipit Manager, Visibility Tool, HDL Bridge and Signal Tracker.

The Chipit Manager for complete project administration and system configuration supports design implementation (synthesis/place and route) and handles design partitioning on the prototyping system.

The Visibility Tool eases debugging of the design by executing the internal design signals after synthesis/place and route which can then be analysed for example with tools such as logic analysers.

Other highlights for debugging are HDL Bridge and Signal Tracker.

HDL Bridge is a powerful tool that provides a direct link between a simulation environment (RTL or gate level) to part or the whole DUT (design under test) that is loaded in the Chipit system.

This ensures that the entire design or parts of it run in hardware already in the simulation phase.

Combined with Signal Tracker for visualisation of the internal signals in the simulator, the designer is provided with an ideal solution for rapid design debugging.

Chipit Platinum V4 is available immediately.

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