Interface aids transaction based verification

ProDesign has developed an SCE-MI based interface for transaction based verification for its successful Chipit ASIC prototyping product line.

ProDesign has developed an SCE-MI based interface for transaction based verification for its successful Chipit ASIC prototyping product line.

Thanks to the increasing complexity and sises of ASIC and SoC designs, verification has become one of the most challenging tasks design and verification engineers face today.

For large ASIC and SoC designs, the simulator performance rapidly decreases.

The simulation performance drops to 1-10Hz precisely at that point in the verification process that requires millions of clock cycles to adequately test and verify software functionality.

At such rates, software debug would take several months.

Simulation accelerators or standard hardware emulators can accelerate the speed from 80kHz up to 2.5MHz at best and thereby significantly cut the verification time compared with pure simulation.

However, the performance that is achieved with such machines in most cases is still too low to develop and verify firmware and software that require speeds between 1 and 20MHz.

To reach such a speed, new verification methodologies like transaction based verification can be used.

"By combining our Chipit high-speed prototyping systems with the SCE-MI interface, Pro Design offers a solution on the transaction-based level which increases verification performance up to in-circuit speed (10 to 150MHz) and reduces the time to market dramatically", said Gunnar Scholl, Director Marketing and Business Development at ProDesign.

"Most co-emulation verification environments have been event-based, which means they have to provide data on every clock cycle or even every subcycle".

"This event-based mechanism is responsible for speed decrease in the cosimulation mode and allows a maximum speed in the kilohertz region".

"In contrast, the transaction-based verification mode accelerates the verification by allowing large amounts of data representing single or multiple clock cycles to be passed into simulation without multiple calls".

"This mechanism helps minimise the communication traffic of the events between the host (test bench) and the Chipit system (prototyping system) resulting in an accelerated co-emulation and a dramatically shortened verification time", added Heiko Mauersberger, CTO of ProDesign.

The SCE-MI transaction based verification toolset is immediately available for Chipit Platinum and Chipit Platinum Edition V4 with a starting price of Eur 15,000 in Europe and US $18,000 in North America.

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