Product category:
Design and Development Software
News Release from: QuickLogic | Subject: Active-HDL
Edited by the Electronicstalk Editorial
Team on 19 December 2001
Design flow manager speeds programmable
logic
Aldec is providing complete support for all QuickLogic devices through Active-HDL's completely automated design flow manager.
Aldec is providing complete support for all QuickLogic devices through Active-HDL's completely automated design flow manager Active-HDL's new design flow manager supports all densities of QuickLogic devices and provides all the necessary precompiled libraries, which can be invoked during the design process
This article was originally published on Electronicstalk on 27 Mar 2001 at 8.00am (UK)
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Active-HDL's design flow manager allows system designers to target QuickLogic devices and includes all design components specific to QuickLogic in the process.
Active-HDL comes pre-installed with all of QuickLogic's libraries so that they can be easily accessed immediately in the design cycle.
Active-HDL offers full integration with QuickLogic's high-density designs, including the industry leading pASIC FPGA and ESP device families.
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All aspects of implementation can be set from directly in the Active-HDL environment.
Once users choose which family of chips they will be designing, the corresponding devices are automatically listed for selection.
Aldec and QuickLogic are continuing to work in conjunction to ensure that QuickLogic designers' needs are met with the latest technologies in Active-HDL.
QuickLogic's commitment to producing devices that support the highest-density FPGA designs prompted the alliance in order to provide system designers with the most advanced tools so that they could produce devices in the shortest time possible with the highest quality results.
"QuickLogic is continually engineering new devices that will support the design requirements for all FPGA designers.
QuickLogic continues to provide designers with high performance devices, and Active-HDL will continue to have the latest in QuickLogic device support'', stated Megan Moran, Product Marketing Manager for Active-HDL.
"We are pleased that Aldec is expanding its support for QuickLogic's ESPs and FPGAs in Active-HDL'', said Mike Holmlund, Product-Marketing Manager.
"The result gives users a powerful development platform for managing their QuickLogic designs''.
Active-HDL's design flow manager is uniquely configured to support synthesis and implementation tools from a single environment; designers can specify the specific device support that they need for each QuickLogic design.
Both Aldec and QuickLogic are currently offering the Active-HDL environment with QuickLogic support.
The product is available as either a floating or node-lock license and includes Aldec's HDL project manager, HDL editor, state machine editor, and block diagram and schematic editors, automatic testbench generation, waveform viewer/editor, and a choice of VHDL, Verilog or mixed VHDL/Verilog/EDIF simulation.
All sales include one year of product maintenance.
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