Latest news on Electronicstalk categorised by supplier
Real Intent
Address:
3910 Freedom Circle
Suite 102A
Santa Clara
CA 95054
USA
Telephone: (USA) +1 408 982 5444
Our RSS feed for news from Real Intent
Request to receive our free email newsletter each week
Listing of all 18 news releases from Real Intent:
Software rises to formal verification challenges
Ascent finds bugs in RTL designs and improves design quality, with significantly higher performance compared with Real Intent's previous generation of automatic verification software.
News from Real Intent (10 December 2007)
Timing software closes in on total coverage
EnVision TCV is described as the only complete software solution for timing closure verification.
News from Real Intent (21 May 2007)
Triple approach verifies clock domain crossing
All-new new approach to CDC verification is engineered to verify that data traversing asynchronous clock domains on ASIC, SoC or FPGA devices is received reliably.
News from Real Intent (16 April 2007)
Timing exception verifier is upgraded
PureTime removes the risk of errors in Synopsys Design Constraint timing exception verification, so designers can avoid chip respins and product introduction delays.
News from Real Intent ( 5 April 2007)
QLogic aims to beat timing exception errors
QLogic, a leader in storage area networking products, has adopted PureTime, Real Intent's formal timing exception verifier software.
News from Real Intent ( 4 December 2006)
Marketing boss joins executive team
Rich Faris has been promoted to Vice President of Marketing and Business Development at Real Intent.
News from Real Intent ( 6 November 2006)
Taiwanese distributor appointed
Real Intent has named Maojet Technology Corp of Taiwan its exclusive distributor for that region.
News from Real Intent ( 6 November 2006)
Verification family spans specification to signoff
Conquest and Ascent join Clock Intent Verification and PureTime to complete the EnVision formal verification product family.
News from Real Intent ( 4 July 2006)
Clock tool software adds debug and simulation
Clock Intent Verification automatically detects clock crossings and insures that the proper synchronisers are present in the design.
News from Real Intent (28 February 2006)
Convergence engine brings verification together
Real Intent has begun shipping its Verix 5.0 software release in volume with a new breakthrough Convergence Engine.
News from Real Intent (21 December 2005)
Verification supports Accelera's PSL
A new version of Verix is now shipping with support for PSL - Accellera's property specification language.
News from Real Intent ( 7 June 2004)
More scope for assertion-based formal verification
Real Intent has released the latest version of its flagship product - Verix 4.0 - that delivers a multi-million-gate capacity for formal assertion verification.
News from Real Intent (11 April 2003)
Lateral Sands to offer Verix verification services
Lateral Sands has joined Real Intent's Verification Service Partner Programme, a 3rd-party programme for formal verification service partners.
News from Real Intent (14 March 2003)
Answer for European distribution
Real Intent has named Answer Systems as its distributor for Europe.
News from Real Intent (14 March 2003)
Real Intent joins Accellera board
Real Intent has joined Accellera as a corporate member to further support the organisation's assertion-based verification efforts.
News from Real Intent (14 March 2003)
Verification system takes in SystemVerilog
Real Intent is to add support for the SystemVerilog DAS (Design Assertion Subset) to its flagship product Verix.
News from Real Intent ( 5 July 2002)
Verification system crosses clock domains
Real Intent has added formal clock intent verification to its flagship electronic design verification system Verix.
News from Real Intent ( 3 June 2002)
Real Intent lines up first three partners
Real Intent has set up its Verification Service Partner Programme, a 3rd party programme for the company's formal functional verification service partners.
News from Real Intent (12 April 2002)

