Microprocessor offers Ethernet PHY transceiver

Renesas Technology Europe's SH7619 32bit SuperH RISC microprocessor is its first device to offer an on-chip ethernet controller with an IEEE802.3 compliant media access controller layer.

Renesas Technology Europe's SH7619 32bit SuperH RISC microprocessor is its first device to offer an on-chip Ethernet controller with an IEEE802.3 compliant media access controller layer.

These make it possible to develop high performance products at lower cost by reducing the number of external components needed.

The device also offers comprehensive on-chip peripheral functions, including a host interface function (HIF) and interface allowing voice codec connection.

It is suitable for use in digital AV, OA and industrial products that have a network connection capability.

The on-chip Ethernet PHY transceiver and Ethernet controller simplify the development of a 10/100Mbit/s Ethernet LAN connection function.

The SH2 CPU core has a maximum operating frequency of 125MHz and a high processing performance of 163MIPS, enabling the high-speed execution of TCP/IP and similar protocol processing and the implementation of high performance systems.

The host interface function allows easy connection to a main microprocessor for system control, for example, with the SH7619 being recognised by the main microprocessor as an SRAM-equivalent device.

This function comprises a 16-bit interface bus and two SRAM banks each with a 1Kbyte linear address space, providing for direct reading and writing from the main microprocessor by access to this SRAM.

It also enables data that is downloaded via an Ethernet to be transferred to the main microprocessor at high speed.

The HIF allows the development of a system's basic functions and network connection related functions to be carried out in parallel, enabling overall system development time to be reduced and also simplifying the addition of an Ethernet connection function to an existing system.

The HIF is also equipped with a boot mode, which allows a program in SDRAM connected to the SH7619 to be downloaded via the host interface from Flash memory connected to the main microprocessor.

This eliminates the need for external Flash memory for SH7619 program storage.

The comprehensive set of on-chip peripherals includes a general-purpose DMA controller that provides high-speed data transfer to and from external memory, enabling network data throughput to be increased.

In addition, the provision of on-chip serial I/O interfaces allows connection to a voice codec or similar device, facilitating the implementation of a VoIP system, for example.

The SH7619 employs a small (13 x 13mm) 176-pin BGA package that helps minimise product size.

On-chip debugging functions are included that enable real-time debugging at the maximum operating frequency, and the small PC card sized E10A-USB can be used as an emulator.

Sample shipments will begin in December 2004.

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