PFT core processes video 20 times faster than DSP

RF Engines has created a new way of simultaneously processing digital signals across a wide spectrum in real time.

RF Engines has created a new way of simultaneously processing digital signals across a wide spectrum in real time.

Following the successful business models of ARM, MIPS and Parthus, RF Engines is making this innovative architecture available as licensable intellectual property in the form of IP cores that can be included in programmable logic devices or SoC designs.

The technology enables a stack of digital frequency convertors or a massively parallel processed pipeline FFT to be replaced with a single chip, thereby reducing overall system cost and power consumption by up to 50%, while significantly improving performance.

The key areas for its use are in broadband applications up to 100MHz, such as the next generation of mobile phone basestations, spectrum analysers, radar and electronic surveillance equipment, that require conversion and filtering of channels (from a few to many thousand) in real time with all channel signals being available for onward processing.

"As this is a hardware implementation rather than software running on a programmable DSP", explains John Lillington, RF Engines' CTO, "we achieve up to twenty times better performance in high end applications.

In fact, PFT makes possible a solution to high-end problems that was not practical before, due to the cost and size of silicon needed for conventional methods.

For example, it would take a huge number of digital frequency convertors and filters or 86 GMACs on a programmable DSP with a total memory bandwidth of 78Gbyte/s, which is not very practical, to match the performance of a 10-stage PFT producing a 1024-point output with a usable bandwidth of 80MHz.

Each bin is equivalent to a digital down-convertor followed by a decimate-by-64 CIC and a 67-tap FIR filter with a 75dB stopband rejection".

The Pipelined Frequency Transform is a specially developed architecture that is optimised for the real-time signal analysis of ultra-wideband signals and transforms the signals from the time domain to the frequency domain as an FFT (fast Fourier transform) would do.

However, unlike an FFT, the PFT also provides high-performance filtering across hundreds of channels.

This could not be done practically in real time on a general purpose DSP running FFT routines.

For example, a demonstration implementation of PFT on four FPGAs can handle in excess of 100MHz bandwidth signal at 8bit resolution and extract 1024 channels with sharp channel filter characteristics of, typically, a filter stopband rejection of better than 75dB (with 8bit A/D data input).

Moreover, it can do a 1024-point transform up to 20 times faster than an FFT implemented on a DSP.

The basic PFT architecture uses a series of frequency-splitting stages to subdivide the original signal band.

The first stage splits the band in half; the second splits the two bands into four, and so on until the required number of bins is achieved.

Decimation at each stage ensures a constant datarate through the pipeline, and hence a continuous data throughput with no loss of data.

Gain across each bin is flat (typically less than +/-0.2dB) and bin-to-bin isolation can be tailored using highly optimised filters within each stage to meet the dynamic range requirements of the system.

An N-point PFT is functionally equivalent to a parallel bank of N individual complex down-convertors; ie all frequency channels are available all of the time.

For large values of N, the PFT solution requires significantly less silicon than the equivalent bank of down-convertors.

Thus, for example, a 16Kpoint transform needs only 14 PFT stages as compared to 16384 digital frequency convertor modules.

The architecture is totally scaleable with intermediate stage outputs simultaneously available if required.

It is configurable so that trade-offs between dynamic range, selectivity, throughput rate and silicon gate requirements can be done under the designer's control to provide the optimal solution for each application.

Being pipelined means that there are no time gaps and therefore no missed data, which is crucial for very fast or fleeting signals.

In addition, it is completely cascadable by adding additional PFT stages to provide higher resolution by increasing the number of points or, conversely, finer resolutions can be achieved if a smaller input bandwidth is used.

Furthermore, and of major significance, the PFT can also be tuned to allow flexible dynamic channelisation of broadband spectrum without affecting static channels during the reconfiguration process.

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