Models ease transition to fixed-point DSP

RF Engines has developed a new set of fast Fourier transform (FFT) and polyphase DFT bit true models for use with Matlab system design software.

RF Engines has developed a new set of fast Fourier transform (FFT) and polyphase DFT bit true models for use with Matlab system design software.

One of the main concerns when moving from floating point DSP processing to a fixed point architecture in FPGAs, is making sure that the overall performance of the processing is not compromised by the fixed-bit-width designs available in the FPGA.

Simon Underhay, RFEL's Technical Sales Manager, commented: "Many of our customers want to make use of our high-performance cores for FPGAs but transforming their floating point DSP requirements into a specification for a fixed point FPGA design is not a straightforward task.

The flexible models we can now provide allow the designer to easily change critical parameters in the design and model the effects on system performance.

This means that a fixed point design can then be purchased that exactly matches the model performance." In the Vectis pipelined FFT model, the designer has control over FFT size, oversampling rate, decimation factor, bin ordering, twiddle precision and FFT processing precision in addition to the input and output precisions.

The Ventrix polyphase DFT model, which provides customisable filter taps to significantly improved the filter response in each of the bins, has the additional benefit of allowing the filter length and polyphase tap precision to be tailored.

Both models are designed to accurately represent the functionality of the RFEL cores, providing the customer with confidence that the delivered core will exactly meet the system requirements.

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