Product category:
Intellectual Property Cores
News Release from: RF Engines | Subject: SpectraChip IF
Edited by the Electronicstalk Editorial
Team on 08 September 2004
Digital solution for spectrum analyser
filtering
SpectraChip IF is a digital replacement for analogue intermediate frequency (IF) filtering used in current spectrum analysers, and is supplied as an IP core for embedding on low cost FPGA devices.
SpectraChip IF is a digital replacement for analogue intermediate frequency (IF) filtering used in current spectrum analysers, and is supplied as an IP core for embedding on low cost FPGA devices SpectraChip IF provides a digital implementation of all the standard features, such as resolution bandwidth filtering, video bandwidth filtering and conversion to log power
This article was originally published on Electronicstalk on 21 Sep 2001 at 8.00am (UK)
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Most existing spectrum analyser designs are based on a swept approach to monitoring a band of the spectrum, which means that the system is only looking at each part of the spectrum for a finite period of time.
By switching off the sweep function and using FFTs and other specialist techniques to perform the spectral analysis means that a wide band of interest can be analysed at all times, and that even very short duration pulses can be captured by the instrument.
The further addition of complex spectral triggering allows storage of spectral data to occur upon a particular event in the frequency domain, this can then be presented to the user using three-dimensional "waterfall" plots or two-dimensional spectrograms, to show how frequency changes over time.
SpectraChip IF can be licensed from RFEL as an off-the-shelf design, and can be easily modified to meet particular interface requirements, as well as achieving different intermediate frequencies and ranges of RBW (resolution bandwidth) and VBW (video bandwidth) that may be required.
The standard design will fit comfortably into the Spartan3 1000 FPGA device costing less than $100, and consumes a mere 0.5W in operation, or significantly less in the power save mode.
This high specification design is available "off the shelf" fully characterised, documented and tested in silicon.
The principle behind the new product range is to simplify and de-risk the embedding and incorporation of high performance, digital designs into instrumentation for spectrum analysis, whether this is for general test instruments or equipment for specific applications.
In many applications, this approach opens the opportunity for real-time monitoring of quality of service and pre-empting service degradation or total failure.
The designs provide a cost-effective and high performance solution wherever high quality spectral analysis is demanded.
The flexible solutions can be upgraded with technological advances and user demands, as part of an ongoing development program.
RFEL can also provide its proven design-in support services, with immediate access to its technical experts where design support is required.
The comprehensive nature of the solutions available provides manufacturers with a platform upon which to design a whole family of products with different specifications to meet a variety of requirements, along with the ability to develop a clear roadmap of product development.
Where appropriate, RFEL will provide bespoke solutions, incorporating specific device choices to meet the user requirement.
John Summers, RFEL's VP of Sales and Business Development, added: "This exciting new range brings together all the expertise that we have developed over many years in the area of signal and electronic intelligence gathering, to provide a complete solution on a chip".
"As the solutions are proven technology using firmware on an FPGA, it is easy to update and modify as required providing manufacturers with a reduced risk development strategy".
Two of the world's leading instrument manufacturers are already using SpectraChip cores in their products.
Solutions based on the SpectraChip designs, cost from $100 for the IP per product (depending on product, volumes and excluding the setup costs) and can provide component savings of up to 50% compared with traditional board solutions.
The signal to be analysed must first be digitised by an ADC.
The digitised data are then presented to the FPGA containing the SpectraChip IF solution.
The standard design will accept a high-speed digitised data stream with a signal IF centred at +/-21.4MHz and a signal bandwidth up to 10MHz.
However, options are available that will allow different IF frequencies and signal bandwidths.
The standard solution can then be controlled by an interface to select RBW, VBW etc equivalent to pressing the buttons on a standard spectrum analyser front panel.
The core then configures itself to the correct settings and produces the filtered signal output, converted to a power reading for analysis by the system or display on a screen.
Other input parameters to the SpectraChip solution allow system calibration to be performed.
At most, the only additional components required are a separate ADC and low cost FPGA.
The FPGAs required cost less than $100 yet provide an extremely high specification performance.
In the SpectraChip MHz and SpectraChip GHz real-time designs, which are currently at an advanced development stage, large bandwidth signals can be presented to the core and one of RFEL's extensive range of filter-bank cores can be used.
Using the programmability benefit of the FPGA, a number of different filter banks can be supplied to meet different measurement requirements.
Standard Gaussian shape filters can be used to produce a standard spectrum analyser effect, or higher specification, flat top, low transition band filters can be used to achieve power measurement accuracy and good frequency isolation.
In the real-time mode, an optional trigger function can be included in the SpectraChip design to allow masked triggering of spurious signals.
This enables fleeting events to be stored and analysed on a time-frequency-power basis or passed via the secondary I and Q outputs to demodulation processes for characterisation.
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