Product category:
Intellectual Property Cores
News Release from: Rambus
Edited by the Electronicstalk Editorial
Team on 13 October 2006
Toshiba signs for intellectual property
Toshiba has signed a licence agreement for the Rambus XDR memory controller interface cell, dubbed XIO, and the Rambus PCI Express Gen 1 PHY cell.
Toshiba has signed a licence agreement for the Rambus XDR memory controller interface cell, dubbed XIO, and the Rambus PCI Express Gen 1 PHY cell The Rambus interface solutions will be implemented in Toshiba's 65nm process technology for integration into the latest consumer, computing, and communications applications
This article was originally published on Electronicstalk on 18 Dec 2007 at 8.00am (UK)
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"Rambus' renowned expertise in high-speed interfaces made their solutions an ideal choice for our state-of-art large scale integration (LSI) devices with high processing power for various applications", said Tomotaka Saito, General Manager of the Broadband System LSI Division at Toshiba's Semiconductor Company.
"The addition of Rambus' XIO and PCI Express interface cells adds to the world-class portfolio of solutions we provide our customers".
The Rambus XIO memory controller is the high-performance, low-latency interface to Rambus' XDR DRAM, today's fastest high-speed memory.
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Ideal for graphics-intensive applications in consumer electronics and computing, a single, 2byte-wide, 3.2GHz XDR DRAM component provides 6.4Gbyte/s of peak bandwidth.
The advanced XDR memory architecture features four key enabling technologies built on patented Rambus innovations.
Differential Rambus Signalling Level (DRSL) is a low-voltage, low-power, differential signalling standard that enables scalable multigigahertz bidirectional and point-to-point databuses that connect an XDR memory controller (XIO) to XDR DRAM devices.
Octal datarate (ODR) is a technology that transfers eight bits of data on each clock cycle, four times as many as today's state-of-the-art memory technologies that use DDR (double datarate) clocking.
FlexPhase circuit technology enables flexible phase relationships between signals, allowing precise on-chip alignment of data with clock.
And Dynamic-Point-to-Point (DPP) is an innovation that maintains the signal integrity benefits of point-to-point signalling on the databus, while providing the flexibility of capacity expansions with module upgrades.
DPP was recognised with a 2005 Innovation of the Year award by industry publication EDN Magazine.
"Toshiba is on the forefront of delivering breakthrough solutions for next-generation systems", said Laura Stark, Senior Vice President of Platform Solutions at Rambus.
"This agreement continues the long and successful collaboration between our companies to provide state-of-the-art technology for today's most demanding computing and consumer electronics products".
The Rambus PCI Express PHY is one of the most widely compliance and interoperability tested PCI Express solution available today.
Rambus' silicon-proven PCI Express PHY cells are complete serial communication cells optimised for implementing the physical layer of the PCI Express standard.
Rambus' PCI Express PHY cells are in production in high-volume applications and have been incorporated in numerous products listed on the PCI-SIG Integrators List, having passed PCI-SIG compliance and interoperability testing by Rambus PHY cell customers and digital controller partners.
The complete, interoperable Rambus PCI Express interface solution consists of PHY cells and digital controllers.
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