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Product category: Intellectual Property Cores
News Release from: Rambus | Subject: XDR memory
Edited by the Electronicstalk Editorial Team on 20 June 2007

Memory IP keeps speed with projector
chips

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Texas Instruments has used the Rambus XDR memory architecture in its DLP integrated circuits.

The Rambus XDR memory architecture has been adopted in Texas Instruments DLP technology Projectors powered by the DLP chip using the XDR memory architecture provide unmatched image quality and stunning colour, and are ideal for displaying movies, sports, games or digital photos

"The XDR memory architecture and its innovative technologies are key enablers of the razor-sharp images and excellent reproduction of fast-motion video made possible by the advanced DLP chip architecture", says Lars Yoder, Vice President and Manager, Front Projection Business Unit, DLP Products, Texas Instruments.

"The Rambus engineering teams supported us with complete services from design through production helping us make a new generation of amazing DLP projectors a reality".

The DLP chip with its millions of microscopic mirrors and the sophisticated electronics that surround it, including the Rambus XDR memory architecture, deliver a stunning viewing experience.

The XDR memory architecture operating at 4.0GHz with a single, 2byte-wide XDR DRAM provides an unmatched 8.0Gbyte/s of peak memory bandwidth.

The Rambus XDR DRAM, XDR memory controller (XMC), XDR I/O cell (XIO) and XDR clock generator (XCG) work together seamlessly to provide the unprecedented levels of memory performance required to generate the precise, lifelike images rich with colour, contrast and brightness delivered by DLP technology.

"TI's DLP technology sets the standard with compelling images demanded by both consumers and businesses", says Sharon Holt, Senior Vice President of Worldwide Sales, Licensing and Marketing at Rambus.

"Rambus and Texas Instruments have a long history of collaboration on leading-edge DLP solutions, and we are very proud to continue our focus on designing and delivering advanced technology that enriches the end-user experience".

The XDR memory architecture features key enabling technologies built on patented Rambus innovations that include low-voltage, low-power differential Rambus signalling level (DRSL); octal datarate (ODR) technology that transfers 8bit of data on each clock cycle; FlexPhase circuit technology for precise on-chip alignment of data with clock; and dynamic-point-to-point (DPP) for point-to-point signalling on the databus.

Proven in high-volume and cost-competitive applications, Rambus solutions are backed by comprehensive engineering support services that range from chip design to system integration, and can scale for future cost reduction.

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